mirror of
https://github.com/AsahiLinux/u-boot
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06ddcfc95a
This value is only referenced by PowerPC code in a way other than directly as CONFIG_SYS_INIT_SP_ADDR. Switch to CONFIG_SYS_INIT_SP_ADDR directly. Signed-off-by: Tom Rini <trini@konsulko.com>
118 lines
3.5 KiB
C
118 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Sysam stmark2 board configuration
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*
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* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
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*/
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#ifndef __STMARK2_CONFIG_H
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#define __STMARK2_CONFIG_H
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#define CONFIG_HOSTNAME "stmark2"
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#define CONFIG_SYS_UART_PORT 0
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#define LDS_BOARD_TEXT \
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board/sysam/stmark2/sbf_dram_init.o (.text*)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kern_size=0x700000\0" \
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"loadaddr=0x40001000\0" \
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"-(rootfs)\0" \
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"update_uboot=loady ${loadaddr}; " \
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"sf probe 0:1 50000000; " \
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"sf erase 0 0x80000; " \
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"sf write ${loadaddr} 0 ${filesize}\0" \
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"update_kernel=loady ${loadaddr}; " \
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"setenv kern_size ${filesize}; saveenv; " \
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"sf probe 0:1 50000000; " \
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"sf erase 0x100000 0x700000; " \
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"sf write ${loadaddr} 0x100000 ${filesize}\0" \
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"update_rootfs=loady ${loadaddr}; " \
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"sf probe 0:1 50000000; " \
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"sf erase 0x00800000 0x100000; " \
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"sf write ${loadaddr} 0x00800000 ${filesize}\0" \
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""
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/* Realtime clock */
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#define CONFIG_RTC_MCFRRTC
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#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
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#define CONFIG_SYS_SBFHDR_SIZE 0x7
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/* Input, PCI, Flexbus, and VCO */
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#define CONFIG_EXTRA_CLOCK
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#define CONFIG_PRAM 2048 /* 2048 KB */
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#define CONFIG_SYS_MBAR 0xFC000000
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/*
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* Definitions for initial stack pointer and data area (in internal SRAM)
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*/
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#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
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/* End of used area in internal SRAM */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
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#define CONFIG_SYS_INIT_RAM_CTRL 0x221
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#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE) - 32)
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#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
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/*
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
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*/
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
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#define CONFIG_SYS_DRAM_TEST
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#if defined(CONFIG_CF_SBF)
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#define CONFIG_SERIAL_BOOT
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#endif
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/* Reserve 256 kB for Monitor */
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#define CONFIG_SYS_MONITOR_LEN (256 << 10)
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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/* Initial Memory map for Linux */
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#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
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(CONFIG_SYS_SDRAM_SIZE << 20))
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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*/
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/* Cache Configuration */
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#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - 8)
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#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - 4)
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#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
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#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
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#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
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CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
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CF_ACR_EN | CF_ACR_SM_ALL)
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#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
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CF_CACR_ICINVA | CF_CACR_EUSP)
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#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
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CF_CACR_DEC | CF_CACR_DDCM_P | \
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CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
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#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - 12)
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#ifdef CONFIG_MCFFEC
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#define CONFIG_SYS_DISCOVER_PHY
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/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
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#ifndef CONFIG_SYS_DISCOVER_PHY
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#define FECDUPLEX FULL
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#define FECSPEED _100BASET
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#endif /* CONFIG_SYS_DISCOVER_PHY */
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#endif
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#endif /* __STMARK2_CONFIG_H */
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