mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 03:03:05 +00:00
eaf6ea6a1d
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com>
75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
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* Patrick Bruenn <p.bruenn@beckhoff.com>
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*
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* Configuration settings for Beckhoff CX9020.
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*
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* Based on Freescale's Linux i.MX mx53loco.h file:
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* Copyright (C) 2010-2011 Freescale Semiconductor.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONFIG_FPGA_COUNT 1
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 2
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/* bootz: zImage/initrd.img support */
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/* USB Configs */
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* Command definition */
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1) \
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func(USB, usb, 0) \
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func(PXE, pxe, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_addr_r=0x75000000\0" \
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"pxefile_addr_r=0x73000000\0" \
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"scriptaddr=0x74000000\0" \
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"ramdisk_addr_r=0x80000000\0" \
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"kernel_addr_r=0x72000000\0" \
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"fdt_high=0xffffffff\0" \
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"console=ttymxc1,115200\0" \
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"stdin=serial\0" \
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"stdout=serial,vidconsole\0" \
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"stderr=serial,vidconsole\0" \
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"fdtfile=imx53-cx9020.dtb\0" \
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BOOTENV
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/* Miscellaneous configurable options */
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/* Physical Memory Map */
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
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#define PHYS_SDRAM_2 CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
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#define PHYS_SDRAM_SIZE (gd->ram_size)
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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/* environment organization */
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/* Framebuffer and LCD */
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#define CONFIG_IMX_VIDEO_SKIP
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#endif /* __CONFIG_H */
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