mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 03:03:05 +00:00
4b9423e6f2
Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com>
234 lines
4.5 KiB
C
234 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020 NXP
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <dm/lists.h>
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#include <dm/root.h>
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#include <dm/device-internal.h>
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#include <asm/arch/s400_api.h>
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#include <asm/arch/imx-regs.h>
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#include <linux/iopoll.h>
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#include <misc.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct imx8ulp_mu {
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struct mu_type *base;
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};
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#define MU_SR_TE0_MASK BIT(0)
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#define MU_SR_RF0_MASK BIT(0)
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#define MU_TR_COUNT 4
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#define MU_RR_COUNT 4
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void mu_hal_init(ulong base)
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{
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struct mu_type *mu_base = (struct mu_type *)base;
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writel(0, &mu_base->tcr);
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writel(0, &mu_base->rcr);
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}
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int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg)
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{
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struct mu_type *mu_base = (struct mu_type *)base;
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u32 mask = MU_SR_TE0_MASK << reg_index;
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u32 val;
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int ret;
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assert(reg_index < MU_TR_COUNT);
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debug("sendmsg sr 0x%x\n", readl(&mu_base->sr));
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/* Wait TX register to be empty. */
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ret = readl_poll_timeout(&mu_base->tsr, val, val & mask, 10000);
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if (ret < 0) {
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debug("%s timeout\n", __func__);
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return -ETIMEDOUT;
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}
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debug("tr[%d] 0x%x\n", reg_index, msg);
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writel(msg, &mu_base->tr[reg_index]);
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return 0;
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}
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int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg)
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{
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struct mu_type *mu_base = (struct mu_type *)base;
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u32 mask = MU_SR_RF0_MASK << reg_index;
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u32 val;
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int ret;
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assert(reg_index < MU_TR_COUNT);
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debug("receivemsg sr 0x%x\n", readl(&mu_base->sr));
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/* Wait RX register to be full. */
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ret = readl_poll_timeout(&mu_base->rsr, val, val & mask, 10000);
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if (ret < 0) {
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debug("%s timeout\n", __func__);
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return -ETIMEDOUT;
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}
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*msg = readl(&mu_base->rr[reg_index]);
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debug("rr[%d] 0x%x\n", reg_index, *msg);
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return 0;
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}
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static int imx8ulp_mu_read(struct mu_type *base, void *data)
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{
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struct imx8ulp_s400_msg *msg = (struct imx8ulp_s400_msg *)data;
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int ret;
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u8 count = 0;
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if (!msg)
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return -EINVAL;
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/* Read first word */
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ret = mu_hal_receivemsg((ulong)base, 0, (u32 *)msg);
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if (ret)
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return ret;
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count++;
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/* Check size */
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if (msg->size > S400_MAX_MSG) {
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*((u32 *)msg) = 0;
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return -EINVAL;
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}
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/* Read remaining words */
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while (count < msg->size) {
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ret = mu_hal_receivemsg((ulong)base, count % MU_RR_COUNT,
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&msg->data[count - 1]);
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if (ret)
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return ret;
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count++;
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}
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return 0;
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}
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static int imx8ulp_mu_write(struct mu_type *base, void *data)
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{
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struct imx8ulp_s400_msg *msg = (struct imx8ulp_s400_msg *)data;
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int ret;
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u8 count = 0;
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if (!msg)
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return -EINVAL;
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/* Check size */
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if (msg->size > S400_MAX_MSG)
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return -EINVAL;
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/* Write first word */
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ret = mu_hal_sendmsg((ulong)base, 0, *((u32 *)msg));
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if (ret)
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return ret;
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count++;
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/* Write remaining words */
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while (count < msg->size) {
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ret = mu_hal_sendmsg((ulong)base, count % MU_TR_COUNT,
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msg->data[count - 1]);
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if (ret)
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return ret;
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count++;
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}
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return 0;
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}
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/*
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* Note the function prototype use msgid as the 2nd parameter, here
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* we take it as no_resp.
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*/
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static int imx8ulp_mu_call(struct udevice *dev, int no_resp, void *tx_msg,
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int tx_size, void *rx_msg, int rx_size)
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{
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struct imx8ulp_mu *priv = dev_get_priv(dev);
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u32 result;
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int ret;
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/* Expect tx_msg, rx_msg are the same value */
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if (rx_msg && tx_msg != rx_msg)
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printf("tx_msg %p, rx_msg %p\n", tx_msg, rx_msg);
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ret = imx8ulp_mu_write(priv->base, tx_msg);
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if (ret)
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return ret;
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if (!no_resp) {
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ret = imx8ulp_mu_read(priv->base, rx_msg);
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if (ret)
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return ret;
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}
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result = ((struct imx8ulp_s400_msg *)rx_msg)->data[0];
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if ((result & 0xff) == 0xd6)
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return 0;
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return -EIO;
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}
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static int imx8ulp_mu_probe(struct udevice *dev)
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{
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struct imx8ulp_mu *priv = dev_get_priv(dev);
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fdt_addr_t addr;
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debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
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addr = devfdt_get_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->base = (struct mu_type *)addr;
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debug("mu base 0x%lx\n", (ulong)priv->base);
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/* U-Boot not enable interrupts, so need to enable RX interrupts */
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mu_hal_init((ulong)priv->base);
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gd->arch.s400_dev = dev;
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return 0;
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}
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static int imx8ulp_mu_remove(struct udevice *dev)
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{
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return 0;
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}
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static int imx8ulp_mu_bind(struct udevice *dev)
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{
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debug("%s(dev=%p)\n", __func__, dev);
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return 0;
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}
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static struct misc_ops imx8ulp_mu_ops = {
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.call = imx8ulp_mu_call,
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};
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static const struct udevice_id imx8ulp_mu_ids[] = {
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{ .compatible = "fsl,imx8ulp-mu" },
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{ }
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};
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U_BOOT_DRIVER(imx8ulp_mu) = {
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.name = "imx8ulp_mu",
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.id = UCLASS_MISC,
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.of_match = imx8ulp_mu_ids,
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.probe = imx8ulp_mu_probe,
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.bind = imx8ulp_mu_bind,
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.remove = imx8ulp_mu_remove,
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.ops = &imx8ulp_mu_ops,
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.priv_auto = sizeof(struct imx8ulp_mu),
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};
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