mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-01-05 01:38:53 +00:00
99e2fbcb69
Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
116 lines
2.1 KiB
Text
116 lines
2.1 KiB
Text
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2006
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de
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*
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* Copyright 2009 Freescale Semiconductor, Inc.
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*/
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#include "config.h"
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OUTPUT_ARCH(powerpc)
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#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
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PHDRS
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{
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text PT_LOAD;
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bss PT_LOAD;
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}
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#endif
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SECTIONS
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{
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/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
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#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
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.bootpg IMAGE_TEXT_BASE - 0x1000 :
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{
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KEEP(*(.bootpg))
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} :text = 0xffff
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#endif
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. = IMAGE_TEXT_BASE;
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.text : {
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*(.text*)
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}
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_etext = .;
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.reloc : {
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_GOT2_TABLE_ = .;
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KEEP(*(.got2))
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KEEP(*(.got))
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_FIXUP_TABLE_ = .;
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KEEP(*(.fixup))
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}
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__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
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__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
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. = ALIGN(8);
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.data : {
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*(.rodata*)
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*(.data*)
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*(.sdata*)
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}
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_edata = .;
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. = ALIGN(4);
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__u_boot_list : {
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KEEP(*(SORT(__u_boot_list*)));
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}
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. = .;
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__start___ex_table = .;
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__ex_table : { *(__ex_table) }
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__stop___ex_table = .;
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. = ALIGN(8);
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__init_begin = .;
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__init_end = .;
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_end = .;
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#ifdef CONFIG_SPL_SKIP_RELOCATE
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. = ALIGN(4);
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__bss_start = .;
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.bss : {
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*(.sbss*)
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*(.bss*)
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}
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. = ALIGN(4);
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__bss_end = .;
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#endif
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/* For nor and nand is needed the SPL with section .resetvec */
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#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC
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#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
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#ifndef BOOT_PAGE_OFFSET
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#define BOOT_PAGE_OFFSET 0x1000
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#endif
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.bootpg IMAGE_TEXT_BASE + BOOT_PAGE_OFFSET :
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{
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arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
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}
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#ifndef RESET_VECTOR_OFFSET
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#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
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#endif
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#elif defined(CONFIG_FSL_ELBC)
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#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
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#else
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#error unknown NAND controller
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#endif
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.resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : {
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KEEP(*(.resetvec))
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} = 0xffff
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#endif
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#ifndef CONFIG_SPL_SKIP_RELOCATE
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/*
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* Make sure that the bss segment isn't linked at 0x0, otherwise its
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* address won't be updated during relocation fixups.
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*/
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. |= 0x10;
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. = ALIGN(4);
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__bss_start = .;
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.bss : {
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*(.sbss*)
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*(.bss*)
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}
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. = ALIGN(4);
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__bss_end = .;
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#endif
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}
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