mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
2c597855aa
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. This commit also adds the following new board devicetree: - sun8i-h3-nanopi-r1.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
42 lines
847 B
Text
42 lines
847 B
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
|
|
*/
|
|
|
|
#include "sunxi-bananapi-m2-plus.dtsi"
|
|
|
|
/ {
|
|
/*
|
|
* Bananapi M2+ v1.2 uses a GPIO line to change the effective
|
|
* resistance on the CPU regulator's feedback pin.
|
|
*/
|
|
reg_vdd_cpux: vdd-cpux {
|
|
compatible = "regulator-gpio";
|
|
regulator-name = "vdd-cpux";
|
|
regulator-type = "voltage";
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <1108475>;
|
|
regulator-max-microvolt = <1308475>;
|
|
regulator-ramp-delay = <50>; /* 4ms */
|
|
gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
|
|
gpios-states = <0x1>;
|
|
states = <1108475 0>, <1308475 1>;
|
|
};
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu-supply = <®_vdd_cpux>;
|
|
};
|
|
|
|
&cpu1 {
|
|
cpu-supply = <®_vdd_cpux>;
|
|
};
|
|
|
|
&cpu2 {
|
|
cpu-supply = <®_vdd_cpux>;
|
|
};
|
|
|
|
&cpu3 {
|
|
cpu-supply = <®_vdd_cpux>;
|
|
};
|