u-boot/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
Reid Tonking df73e791ce arm: dts: j7200: dts sync with Linux 6.6-rc1
Sync j7200 dts with Linux 6.6-rc1

- k3-j7200-r5-common-proc-board.dts now inherits from
  k3-j7200-common-proc-board.dts instead of k3-j7200-som-p0.dtsi. This
  allows us to trim down the r5 file considerably by using existing
  properties

- remove pimux nodes from r5 file

- remove duplicate nodes & node properties from r5/u-boot files

- mcu_timer0 now used instead of timer1

  mcu_timer0 device id added to dev-data.c file in order to work

- remove cpsw node

  This node is no longer required since the compatible is now fixed

- remove dummy_clock_19_2_mhz

  This node wasn't being used anyhere, so it was removed

- remove dummy_clock_200mhz

  main_sdhci0 & main_sdhci1 no longer need dummy clock for eMMC/SD

- fix secure proxy node

  mcu_secproxy changed to used secure_prxy_mcu which is already
  defined in k3-j7200-mcu-wakeup.dtsi

- removed &mcu_ringacc property override since they're present in
  v6.6-rc1

Signed-off-by: Reid Tonking <reidt@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-12 14:06:04 -04:00

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
#include "k3-j7200-binman.dtsi"
/ {
chosen {
tick-timer = &mcu_timer0;
};
};
&cbass_main {
bootph-all;
};
&main_navss {
bootph-all;
};
&main_esm {
bootph-all;
};
&cbass_mcu_wakeup {
bootph-all;
chipid@43000014 {
bootph-all;
};
};
&mcu_navss {
bootph-all;
};
&mcu_ringacc {
bootph-all;
};
&mcu_udmap {
reg = <0x0 0x285c0000 0x0 0x100>,
<0x0 0x284c0000 0x0 0x4000>,
<0x0 0x2a800000 0x0 0x40000>,
<0x0 0x284a0000 0x0 0x4000>,
<0x0 0x2aa00000 0x0 0x40000>,
<0x0 0x28400000 0x0 0x2000>;
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
"tchanrt", "rflow";
bootph-all;
};
&secure_proxy_main {
bootph-all;
};
&dmsc {
bootph-all;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-all;
};
};
&k3_pds {
bootph-all;
};
&k3_clks {
bootph-all;
};
&k3_reset {
bootph-all;
};
&wkup_pmx0 {
bootph-all;
};
&wkup_pmx2 {
bootph-all;
};
&main_pmx0 {
bootph-all;
};
&main_uart0 {
bootph-all;
};
&main_uart2 {
bootph-all;
};
&mcu_uart0 {
bootph-all;
};
&main_sdhci0 {
bootph-all;
};
&main_sdhci1 {
bootph-all;
};
&wkup_i2c0 {
bootph-all;
};
&main_i2c0 {
bootph-all;
};
&exp1 {
bootph-all;
};
&exp2 {
bootph-all;
};
&mcu_cpsw {
bootph-all;
};
&mcu_uart0 {
bootph-all;
};
&wkup_i2c0 {
bootph-all;
};
&wkup_uart0 {
bootph-all;
};
&fss {
bootph-all;
};
&main_uart0_pins_default {
bootph-all;
};
&main_mmc1_pins_default {
bootph-all;
};
&main_i2c0_pins_default {
bootph-all;
};
&wkup_i2c0_pins_default {
bootph-all;
};
&wkup_uart0_pins_default {
bootph-all;
};
&wkup_gpio_pins_default {
bootph-all;
};
&wkup_gpio0 {
bootph-all;
};
&hbmc {
bootph-all;
flash@0,0 {
bootph-all;
};
};
&hbmc_mux {
bootph-all;
};
&usbss0 {
bootph-all;
ti,usb2-only;
};
&usb0 {
dr_mode = "peripheral";
bootph-all;
};
&ospi0 {
bootph-all;
};
&serdes_ln_ctrl {
bootph-all;
};
&usb_serdes_mux {
bootph-all;
};
&serdes0 {
bootph-all;
};