mirror of
https://github.com/AsahiLinux/u-boot
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f340a162fb
Fix up build step numbering.
Fixes: c727b81d65 ("doc: board: ti: k3: Reuse build instructions")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
259 lines
6.6 KiB
ReStructuredText
259 lines
6.6 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
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J721E Platforms
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===============
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Introduction:
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-------------
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The J721e family of SoCs are part of K3 Multicore SoC architecture platform
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targeting automotive applications. They are designed as a low power, high
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performance and highly integrated device architecture, adding significant
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enhancement on processing power, graphics capability, video and imaging
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processing, virtualization and coherent memory support.
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The device is partitioned into three functional domains, each containing
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specific processing cores and peripherals:
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1. Wake-up (WKUP) domain:
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* Device Management and Security Controller (DMSC)
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2. Microcontroller (MCU) domain:
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* Dual Core ARM Cortex-R5F processor
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3. MAIN domain:
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* Dual core 64-bit ARM Cortex-A72
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* 2 x Dual cortex ARM Cortex-R5 subsystem
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* 2 x C66x Digital signal processor sub system
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* C71x Digital signal processor sub-system with MMA.
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More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
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Platform information:
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* https://www.ti.com/tool/J721EXSOMXEVM
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* https://www.ti.com/tool/SK-TDA4VM
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Boot Flow:
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----------
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Boot flow is similar to that of AM65x SoC and extending it with remoteproc
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support. Below is the pictorial representation of boot flow:
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.. image:: img/boot_diagram_j721e.svg
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:alt: Boot flow diagram
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- Here DMSC acts as master and provides all the critical services. R5/A72
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requests DMSC to get these services done as shown in the above diagram.
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Sources:
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--------
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_boot_sources
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:end-before: .. k3_rst_include_end_boot_sources
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Build procedure:
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----------------
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0. Setup the environment variables:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_common_env_vars_desc
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:end-before: .. k3_rst_include_end_common_env_vars_desc
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_board_env_vars_desc
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:end-before: .. k3_rst_include_end_board_env_vars_desc
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Set the variables corresponding to this platform:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_common_env_vars_defn
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:end-before: .. k3_rst_include_end_common_env_vars_defn
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.. code-block:: bash
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$ export UBOOT_CFG_CORTEXR=j721e_evm_r5_defconfig
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$ export UBOOT_CFG_CORTEXA=j721e_evm_a72_defconfig
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$ export TFA_BOARD=generic
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$ # we dont use any extra TFA parameters
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$ unset TFA_EXTRA_ARGS
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$ export OPTEE_PLATFORM=k3-j721e
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$ # we dont use any extra OP-TEE parameters
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$ unset OPTEE_EXTRA_ARGS
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.. j721e_evm_rst_include_start_build_steps
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1. Trusted Firmware-A:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_tfa
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:end-before: .. k3_rst_include_end_build_steps_tfa
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2. OP-TEE:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_optee
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:end-before: .. k3_rst_include_end_build_steps_optee
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3. U-Boot:
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* 3.1 R5:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_spl_r5
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:end-before: .. k3_rst_include_end_build_steps_spl_r5
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* 3.2 A72:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_uboot
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:end-before: .. k3_rst_include_end_build_steps_uboot
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.. j721e_evm_rst_include_end_build_steps
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Target Images
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--------------
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In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img.
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Each SoC variant (GP, HS-FS and HS-SE) requires a different source for these
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files.
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- GP
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* tiboot3-j721e-gp-evm.bin, sysfw-j721e-gp-evm.itb from step 3.1
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* tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
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- HS-FS
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* tiboot3-j721e_sr2-hs-fs-evm.bin, sysfw-j721e_sr2-hs-fs-evm.itb from step 3.1
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* tispl.bin, u-boot.img from step 3.2
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- HS-SE
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* tiboot3-j721e_sr2-hs-evm.bin, sysfw-j721e_sr2-hs-evm.itb from step 3.1
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* tispl.bin, u-boot.img from step 3.2
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Image formats:
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--------------
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- tiboot3.bin
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.. image:: img/no_multi_cert_tiboot3.bin.svg
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:alt: tiboot3.bin image format
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- tispl.bin
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.. image:: img/dm_tispl.bin.svg
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:alt: tispl.bin image format
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- sysfw.itb
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.. image:: img/sysfw.itb.svg
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:alt: sysfw.itb image format
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R5 Memory Map:
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--------------
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.. list-table::
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:widths: 16 16 16
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:header-rows: 1
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* - Region
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- Start Address
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- End Address
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* - SPL
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- 0x41c00000
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- 0x41c40000
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* - EMPTY
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- 0x41c40000
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- 0x41c81920
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* - STACK
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- 0x41c85920
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- 0x41c81920
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* - Global data
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- 0x41c859f0
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- 0x41c85920
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* - Heap
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- 0x41c859f0
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- 0x41cf59f0
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* - BSS
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- 0x41cf59f0
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- 0x41cff9f0
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* - MCU Scratchpad
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- 0x41cff9fc
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- 0x41cffbfc
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* - ROM DATA
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- 0x41cffbfc
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- 0x41cfffff
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OSPI:
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-----
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ROM supports booting from OSPI from offset 0x0.
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Flashing images to OSPI:
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Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
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and sysfw.itb over tftp and then flash those to OSPI at their respective
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addresses.
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.. code-block:: text
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=> sf probe
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=> tftp ${loadaddr} tiboot3.bin
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=> sf update $loadaddr 0x0 $filesize
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=> tftp ${loadaddr} tispl.bin
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=> sf update $loadaddr 0x80000 $filesize
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=> tftp ${loadaddr} u-boot.img
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=> sf update $loadaddr 0x280000 $filesize
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=> tftp ${loadaddr} sysfw.itb
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=> sf update $loadaddr 0x6C0000 $filesize
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Flash layout for OSPI:
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.. image:: img/ospi_sysfw.svg
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:alt: OSPI flash partition layout
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Firmwares:
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----------
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The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
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The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured
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and controlled by the ethernet firmware that executes in the MAIN Cortex R5.
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The default supported environment variables support loading these firmwares
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from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load
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and start the remote cores in the system.
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J721E common processor board can be attached to a Ethernet QSGMII card and the
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PHY in the card has to be reset before it can be used for data transfer.
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"do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to
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configure this PHY.
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Debugging U-Boot
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----------------
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See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
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detailed setup information.
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.. warning::
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**OpenOCD support since**: v0.12.0
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If the default package version of OpenOCD in your development
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environment's distribution needs to be updated, it might be necessary to
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build OpenOCD from the source.
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_openocd_connect_XDS110
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:end-before: .. k3_rst_include_end_openocd_connect_XDS110
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To start OpenOCD and connect to the board
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.. code-block:: bash
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openocd -f board/ti_j721eevm.cfg
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