Dylan Hung 95f7955384 clk: ast2600: Keep PLL power on ... According to the PLL vendor, we should keep the PLL power on, so we shouldn't toggle the power-down bit during PLL initialization. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>		2023-03-06 17:03:56 -05:00
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clk_ast2500.c	clk: aspeed: Get HCLK frequency support	2022-09-13 12:08:40 -04:00
clk_ast2600.c	clk: ast2600: Keep PLL power on	2023-03-06 17:03:56 -05:00
Makefile	clk: aspeed: Add AST2600 clock support	2021-01-18 15:14:56 -05:00