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When enabling a PWM, allow the existing clock rate and source to stand unchanged. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
/*
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* Tegra pulse width frequency modulator definitions
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*
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* Copyright (c) 2011 The Chromium OS Authors.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_TEGRA_PWM_H
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#define __ASM_ARCH_TEGRA_PWM_H
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/* This is a single PWM channel */
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struct pwm_ctlr {
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uint control; /* Control register */
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uint reserved[3]; /* Space space */
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};
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#define PWM_NUM_CHANNELS 4
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/* PWM_CONTROLLER_PWM_CSR_0/1/2/3_0 */
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#define PWM_ENABLE_SHIFT 31
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#define PWM_ENABLE_MASK (0x1 << PWM_ENABLE_SHIFT)
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#define PWM_WIDTH_SHIFT 16
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#define PWM_WIDTH_MASK (0x7FFF << PWM_WIDTH_SHIFT)
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#define PWM_DIVIDER_SHIFT 0
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#define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT)
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/**
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* Program the PWM with the given parameters.
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*
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* @param channel PWM channel to update
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* @param rate Clock rate to use for PWM, or 0 to leave alone
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* @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high,
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* n = n/256 pulse high
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* @param freq_divider frequency divider value (1 to use rate as is)
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*/
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void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider);
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/**
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* Request a pwm channel as referenced by a device tree node.
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*
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* This channel can then be passed to pwm_enable().
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*
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* @param blob Device tree blob
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* @param node Node containing reference to pwm
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* @param prop_name Property name of pwm reference
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* @return channel number, if ok, else -1
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*/
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int pwm_request(const void *blob, int node, const char *prop_name);
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/**
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* Set up the pwm controller, by looking it up in the fdt.
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*
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* @return 0 if ok, -1 if the device tree node was not found or invalid.
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*/
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int pwm_init(const void *blob);
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#endif /* __ASM_ARCH_TEGRA_PWM_H */
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