Steven A. Falco 644362c40a PPC405EX CHIP_21 erratum ... APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated 4/27/11) states that rev D processors may wake up with the wrong feature set. This patch implements the APM-proposed workaround. To enable this patch for your board, add the appropriate define for your CPU to your board header file. See kilauea.h for more information. The following variants are supported: #define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY Please note that if you select the wrong define, your board will not boot, and JTAG will be required to recover. Tested on custom boards using: CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY <sfalco@harris.com> CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY <eibach@gdsys.de> Signed-off-by: Steve Falco <sfalco@harris.com> Acked-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>		2011-05-12 16:10:51 +02:00
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arm	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00
avr32	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
blackfin	gpio: generalize for all generic gpio providers	2011-04-13 15:56:51 -04:00
m68k	Merge branch 'master' of git://git.denx.de/u-boot-arm	2011-04-27 21:48:09 +02:00
microblaze	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
mips	MIPS: Move timer code to arch/mips/cpu/$(CPU)/	2011-05-10 00:12:31 +09:00
nios2	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00
powerpc	PPC405EX CHIP_21 erratum	2011-05-12 16:10:51 +02:00
sh	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00
sparc	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
x86	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00