Ye Li 01aa4cd8ba imx8ulp: ddr: Fix DDR frequency request issue ... After acking the requested frequency, should wait the ack bit clear by DDR controller and check the DFS interrupt for next request polling. Otherwise, the next polling of request bit will get previous value that DDR controller have not cleared it, so a wrong request frequency is used. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>		2022-02-05 13:38:39 +01:00
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ddr_init.c	imx8ulp: ddr: Fix DDR frequency request issue	2022-02-05 13:38:39 +01:00
Kconfig	imx8ulp:ddr: saving the dram config timing data into sram	2022-02-05 13:38:39 +01:00
Makefile