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443ce4ac9d
With these fixes, this driver works properly for multi chip addressging mode Bugfixes: 1. Build error fixed for function mv88e61xx_busychk_multic-fixed 2. PHY dev address error detection- fixed 3. wrong busy bit was refered in function mv88e61xx_busychk -fixed 4. invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
62 lines
2 KiB
C
62 lines
2 KiB
C
/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Prafulla Wadaskar <prafulla@marvell.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef _MV88E61XX_H
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#define _MV88E61XX_H
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#include <miiphy.h>
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#define MV88E61XX_CPU_PORT 0x5
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#define MV88E61XX_MAX_PORTS_NUM 0x6
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#define MV88E61XX_PHY_TIMEOUT 100000
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#define MV88E61XX_PRT_STS_REG 0x1
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#define MV88E61XX_PRT_CTRL_REG 0x4
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#define MV88E61XX_PRT_VMAP_REG 0x6
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#define MV88E61XX_PRT_VID_REG 0x7
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#define MV88E61XX_PRT_OFST 0x10
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#define MV88E61XX_PHY_CMD 0x18
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#define MV88E61XX_PHY_DATA 0x19
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#define MV88E61XX_RGMII_TIMECTRL_REG 0x1A
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#define MV88E61XX_GLB2REG_DEVADR 0x1C
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#define MV88E61XX_BUSY_OFST 15
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#define MV88E61XX_MODE_OFST 12
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#define MV88E61XX_OP_OFST 10
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#define MV88E61XX_ADDR_OFST 5
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#ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE
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static int mv88e61xx_busychk_multic(char *name, u32 devaddr);
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static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data);
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static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data);
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#define WR_PHY mv88e61xx_wr_phy
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#define RD_PHY mv88e61xx_rd_phy
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#else
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#define WR_PHY miiphy_write
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#define RD_PHY miiphy_read
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#endif /* CONFIG_MV88E61XX_MULTICHIP_ADRMODE */
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#endif /* _MV88E61XX_H */
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