Ashish Kumar 63b2316c5c fsl-layerscape: Consolidate registers space defination for CCI-400 bus ... CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com>		2017-09-11 07:55:36 -07:00
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arc	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
arm	fsl-layerscape: Consolidate registers space defination for CCI-400 bus	2017-09-11 07:55:36 -07:00
m68k	m68k: add board stmark2, mcf5441x based	2017-08-18 01:26:52 +02:00
microblaze	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
mips	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
nds32	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
nios2	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
powerpc	powerpc: Rework interrupt_init_cpu()	2017-08-26 14:56:08 -04:00
sandbox	sandbox: Add a dummy invalidate_dcache_range() function	2017-08-28 07:17:16 -04:00
sh	sh: Fix linking of ms7722se	2017-08-27 11:50:16 -04:00
x86	x86: baytrail: acpi: Add full reset bit to the reset register value in FADT	2017-09-02 23:35:55 +08:00
xtensa	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
.gitignore	.gitignore: drop include/asm/proc from ignore pattern	2014-06-19 11:18:54 -04:00
Kconfig	usb: net: migrate USB Ethernet adapters to Kconfig	2017-09-08 10:23:00 -04:00