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b2e2142c50
On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses self modifying code and this doesn't work with stack in d-cache, since I can't move the code from d-cache to i-cache. We move the SPR test to be executed a little later, after relocation. Then stack is located in SDRAM and this self-modifying code is no problem anymore. Signed-off-by: Stefan Roese <sr@denx.de> |
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board | ||
cpu | ||
drivers | ||
lib_ppc | ||
Makefile | ||
post.c | ||
rules.mk | ||
tests.c |