u-boot/arch/x86
Bin Meng 638a058941 x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).

Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-21 07:46:27 -06:00
..
cpu x86: baytrail: Save mrc cache to spi flash 2015-10-21 07:46:27 -06:00
dts x86: Enable mrc cache for bayleybay and minnowmax 2015-10-21 07:46:27 -06:00
include/asm x86: Use struct mrc_region to describe a mrc region 2015-10-21 07:46:27 -06:00
lib x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init() 2015-10-21 07:46:27 -06:00
config.mk efi: Add 64-bit payload support 2015-08-05 08:44:07 -06:00
Kconfig x86: Add ENABLE_MRC_CACHE Kconfig option 2015-10-21 07:46:26 -06:00
Makefile x86: Add support for U-Boot as an EFI application 2015-08-05 08:44:06 -06:00