mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
0567099bea
There are a few remaining places where we say CONFIG_SECURE_BOOT rather
than CONFIG_IMX HAB. Update these instances.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Fixes: d714a75fd4 ("imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
137 lines
3.5 KiB
INI
137 lines
3.5 KiB
INI
/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Refer docs/README.imxmage for more details about how-to configure
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* and create imximage boot image
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*
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* The syntax is taken as close as possible with the kwbimage
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*/
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#define __ASSEMBLY__
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#include <config.h>
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/* image version */
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IMAGE_VERSION 2
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/*
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* Boot Device : one of
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* spi/sd/nand/onenand, qspi/nor
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*/
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BOOT_FROM sd
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#ifdef CONFIG_USE_IMXIMG_PLUGIN
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/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
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PLUGIN board/freescale/mx7ulp_evk/plugin.bin 0x2F020000
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#else
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#ifdef CONFIG_IMX_HAB
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CSF CONFIG_CSF_SIZE
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#endif
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/*
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* Device Configuration Data (DCD)
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*
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* Each entry must have the format:
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* Addr-type Address Value
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*
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* where:
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* Addr-type register length (1,2 or 4 bytes)
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* Address absolute address of the register
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* value value to be stored in the register
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*/
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DATA 4 0x403f00dc 0x00000000
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DATA 4 0x403e0040 0x01000020
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DATA 4 0x403e0500 0x01000000
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DATA 4 0x403e050c 0x80808080
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DATA 4 0x403e0508 0x00160002
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DATA 4 0x403E0510 0x00000001
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DATA 4 0x403E0514 0x00000014
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DATA 4 0x403e0500 0x00000001
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CHECK_BITS_SET 4 0x403e0500 0x01000000
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/*
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* Default PFD0 divide is 27, which generates:
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* PFD0 Freq = A7 APLL (528MHz) * 18 / 27 = 352MHz
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*
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* i.MX7ULP COM board can not run DDR at 352MHz, so
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* use a divider of 30 (0x1E), which gives:
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*
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* PFD0 Freq = A7 APLL (528MHz) * 18 / 30 = 316.8MHz
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*/
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DATA 4 0x403e050c 0x8080801E
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CHECK_BITS_SET 4 0x403e050c 0x00000040
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DATA 4 0x403E0030 0x00000001
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DATA 4 0x403e0040 0x11000020
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DATA 4 0x403f00dc 0x42000000
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DATA 4 0x40B300AC 0x40000000
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DATA 4 0x40AD0128 0x00040000
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DATA 4 0x40AD00F8 0x00000000
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DATA 4 0x40AD00D8 0x00000180
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DATA 4 0x40AD0104 0x00000180
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DATA 4 0x40AD0108 0x00000180
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DATA 4 0x40AD0124 0x00010000
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DATA 4 0x40AD0080 0x0000018C
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DATA 4 0x40AD0084 0x0000018C
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DATA 4 0x40AD0088 0x0000018C
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DATA 4 0x40AD008C 0x0000018C
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DATA 4 0x40AD0120 0x00010000
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DATA 4 0x40AD010C 0x00000180
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DATA 4 0x40AD0110 0x00000180
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DATA 4 0x40AD0114 0x00000180
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DATA 4 0x40AD0118 0x00000180
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DATA 4 0x40AD0090 0x00000180
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DATA 4 0x40AD0094 0x00000180
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DATA 4 0x40AD0098 0x00000180
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DATA 4 0x40AD009C 0x00000180
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DATA 4 0x40AD00E0 0x00040000
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DATA 4 0x40AD00E4 0x00040000
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DATA 4 0x40AB001C 0x00008000
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DATA 4 0x40AB085C 0x0D3900A0
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DATA 4 0x40AB0800 0xA1390003
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DATA 4 0x40AB0890 0x00400000
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DATA 4 0x40AB081C 0x33333333
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DATA 4 0x40AB0820 0x33333333
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DATA 4 0x40AB0824 0x33333333
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DATA 4 0x40AB0828 0x33333333
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DATA 4 0x40AB08C0 0x24922492
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DATA 4 0x40AB0848 0x3A3E3838
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DATA 4 0x40AB0850 0x28282C2A
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DATA 4 0x40AB083C 0x20000000
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DATA 4 0x40AB0840 0x00000000
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DATA 4 0x40AB08B8 0x00000800
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DATA 4 0x40AB000C 0x292C40F5
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DATA 4 0x40AB0004 0x00020064
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DATA 4 0x40AB0010 0xB6AD0A83
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DATA 4 0x40AB0014 0x00C70093
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DATA 4 0x40AB0018 0x00211708
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DATA 4 0x40AB002C 0x0F9F26D2
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DATA 4 0x40AB0030 0x009F0E10
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DATA 4 0x40AB0038 0x00130556
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DATA 4 0x40AB0008 0x12272000
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DATA 4 0x40AB0040 0x0000003F
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DATA 4 0x40AB0000 0xC3110000
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DATA 4 0x40AB001C 0x00008010
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DATA 4 0x40AB001C 0x00008018
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DATA 4 0x40AB001C 0x003F8030
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DATA 4 0x40AB001C 0xFF0A8030
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DATA 4 0x40AB001C 0x82018030
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DATA 4 0x40AB001C 0x06028030
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DATA 4 0x40AB001C 0x01038030
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DATA 4 0x40AB001C 0x003F8038
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DATA 4 0x40AB001C 0xFF0A8038
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DATA 4 0x40AB001C 0x82018038
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DATA 4 0x40AB001C 0x06028038
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DATA 4 0x40AB001C 0x01038038
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DATA 4 0x40AB083C 0xA0000000
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DATA 4 0x40AB083C 0xA0000000
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DATA 4 0x40AB0020 0x00001800
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DATA 4 0x40AB0800 0xA1310003
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DATA 4 0x40AB001C 0x00000000
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#endif
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