mirror of
https://github.com/AsahiLinux/u-boot
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129 lines
3.8 KiB
ReStructuredText
129 lines
3.8 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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Sipeed's Lichee PI 4A based on T-HEAD TH1520 SoC
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================================================
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The LicheePi4A is a high-performance RISC-V SBC based on TH1520(4xC910@1.85GHz),
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comes with 4/8/16 GB RAM, and up to 128GB eMMC, and rich peripherals.
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- SoC T-HEAD TH1520 SoC
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- System Memory 4GB, 8GB, or 16GB LPDDR4X
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- Storage eMMC flash with 8/32/128 GB
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- external microSD slot
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- Networking 2x Gigabit Ethernet
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- WiFi+BT
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- Display HDMI2.0, 4-lane MIPI DSI
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- Camera 4-lane MIPI CSI + 2x2-lane MIPI CSI
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- Audio Onboard Speaker, 2xMEMS MIC, 3.5mm headphone jack
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- USB 4xUSB3.0 Type-A, 1xUSB2.0 Type-C
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- GPIO 2x10Pin breakout, UART/IIC/SPI
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- Power DC 12V/2A, POE 5V/2.4A, USB Type-C 5V/2A
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TH1520 RISC-V SoC
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-----------------
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The TH1520 SoC consist of quad-core RISC-V Xuantie C910 (RV64GCV) processor,
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Xuantie C906 audio DSP, low power Xuantie E902 core, it also integrate
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Imagination GPU for graphics, and 4 TOPS NPU for AI acceleration.
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Mainline support
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----------------
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The support for following drivers are already enabled:
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1. ns16550 UART Driver.
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Building
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~~~~~~~~
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1. Add the RISC-V toolchain to your PATH.
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2. Setup ARCH & cross compilation environment variable:
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.. code-block:: none
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export CROSS_COMPILE=<riscv64 toolchain prefix>
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The U-Boot is capable of running in M-Mode, so we can directly build it.
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.. code-block:: console
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cd <U-Boot-dir>
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make th1520_lpi4a_defconfig
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make
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This will generate u-boot-dtb.bin
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Booting
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~~~~~~~
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Currently, we rely on vendor u-boot to initialize the clock, pinctrl subsystem,
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and chain load the mainline u-boot image either via tftp or emmc storage,
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then bootup from it.
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Sample boot log from Lichee PI 4A board via tftp
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. code-block:: none
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brom_ver 8
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[APP][E] protocol_connect failed, exit.
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U-Boot SPL 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000)
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FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init
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ddr initialized, jump to uboot
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image has no header
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U-Boot 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000)
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CPU: rv64imafdcvsu
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Model: T-HEAD c910 light
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DRAM: 8 GiB
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C910 CPU FREQ: 750MHz
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AHB2_CPUSYS_HCLK FREQ: 250MHz
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AHB3_CPUSYS_PCLK FREQ: 125MHz
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PERISYS_AHB_HCLK FREQ: 250MHz
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PERISYS_APB_PCLK FREQ: 62MHz
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GMAC PLL POSTDIV FREQ: 1000MHZ
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DPU0 PLL POSTDIV FREQ: 1188MHZ
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DPU1 PLL POSTDIV FREQ: 1188MHZ
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MMC: sdhci@ffe7080000: 0, sd@ffe7090000: 1
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Loading Environment from MMC... OK
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Error reading output register
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Warning: cannot get lcd-en GPIO
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LCD panel cannot be found : -121
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splash screen startup cost 16 ms
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In: serial
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Out: serial
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Err: serial
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Net:
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Warning: ethernet@ffe7070000 using MAC address from ROM
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eth0: ethernet@ffe7070000ethernet@ffe7070000:0 is connected to ethernet@ffe7070000. Reconnecting to ethernet@ffe7060000
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Warning: ethernet@ffe7060000 (eth1) using random MAC address - 42:25:d4:16:5f:fc
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, eth1: ethernet@ffe7060000
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Hit any key to stop autoboot: 2
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ethernet@ffe7060000 Waiting for PHY auto negotiation to complete.. done
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Speed: 1000, full duplex
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Using ethernet@ffe7070000 device
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TFTP from server 192.168.8.50; our IP address is 192.168.8.45
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Filename 'u-boot-dtb.bin'.
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Load address: 0x1c00000
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Loading: * #########################
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8 MiB/s
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done
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Bytes transferred = 376686 (5bf6e hex)
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## Starting application at 0x01C00000 ...
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U-Boot 2023.07-rc2-00004-g1befbe31c1 (May 23 2023 - 18:40:01 +0800)
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CPU: rv64imafdc
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Model: Sipeed Lichee Pi 4A
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DRAM: 8 GiB
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Core: 13 devices, 6 uclasses, devicetree: separate
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Loading Environment from <NULL>... OK
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In: serial@ffe7014000
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Out: serial@ffe7014000
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Err: serial@ffe7014000
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Model: Sipeed Lichee Pi 4A
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LPI4A=>
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