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Implement the functions invalidate_icache_range() and invalidate_icache_all(). RISC-V does not have instructions for explicit cache-control. The functions in this patch are implemented with the memory ordering instruction for synchronizing the instruction and data streams. This may be implemented as a cache flush or invalidate on simple processors, others may only invalidate the relevant cache lines. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
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.. | ||
boot.c | ||
bootm.c | ||
cache.c | ||
crt0_riscv_efi.S | ||
elf_riscv32_efi.lds | ||
elf_riscv64_efi.lds | ||
interrupts.c | ||
Makefile | ||
reloc_riscv_efi.c | ||
reset.c | ||
setjmp.S |