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https://github.com/AsahiLinux/u-boot
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a20be24cd4
The PCA9450 reset configuration can now be performed by the PCA9450 PMIC driver itself, remove the hard-coded variant from board code and let the PMIC driver perform this task using one-liner: ``` $ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/) ``` Venice and i.MX93 EVK required slight manual fix up. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
126 lines
2.3 KiB
C
126 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 NXP
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*/
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#include <common.h>
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#include <command.h>
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#include <cpu_func.h>
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#include <hang.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/imx93_pins.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/arch-mx7ulp/gpio.h>
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#include <asm/mach-imx/syscounter.h>
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#include <asm/mach-imx/s400_api.h>
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#include <dm/uclass.h>
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#include <dm/device.h>
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#include <dm/uclass-internal.h>
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#include <dm/device-internal.h>
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#include <linux/delay.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ccm_regs.h>
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#include <asm/arch/ddr.h>
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#include <power/pmic.h>
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#include <power/pca9450.h>
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#include <asm/arch/trdc.h>
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DECLARE_GLOBAL_DATA_PTR;
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int spl_board_boot_device(enum boot_device boot_dev_spl)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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void spl_board_init(void)
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{
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puts("Normal Boot\n");
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}
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void spl_dram_init(void)
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{
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ddr_init(&dram_timing);
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}
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#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
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int power_init_board(void)
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{
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struct udevice *dev;
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int ret;
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ret = pmic_get("pmic@25", &dev);
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if (ret == -ENODEV) {
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puts("No pca9450@25\n");
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return 0;
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}
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if (ret != 0)
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return ret;
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/* BUCKxOUT_DVS0/1 control BUCK123 output */
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pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
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/* 0.9v
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*/
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pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
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pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
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/* I2C_LT_EN*/
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pmic_reg_write(dev, 0xa, 0x3);
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return 0;
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}
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#endif
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extern int imx9_probe_mu(void *ctx, struct event *event);
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void board_init_f(ulong dummy)
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{
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int ret;
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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timer_init();
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arch_cpu_init();
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board_early_init_f();
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spl_early_init();
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preloader_console_init();
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ret = imx9_probe_mu(NULL, NULL);
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if (ret) {
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printf("Fail to init Sentinel API\n");
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} else {
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printf("SOC: 0x%x\n", gd->arch.soc_rev);
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printf("LC: 0x%x\n", gd->arch.lifecycle);
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}
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power_init_board();
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/* 1.7GHz */
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set_arm_clk(1700000000);
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/* Init power of mix */
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soc_power_init();
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/* Setup TRDC for DDR access */
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trdc_init();
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/* DDR initialization */
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spl_dram_init();
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/* Put M33 into CPUWAIT for following kick */
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ret = m33_prepare();
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if (!ret)
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printf("M33 prepare ok\n");
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board_init_r(NULL, 0);
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}
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