mirror of
https://github.com/AsahiLinux/u-boot
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60e7fa8b3b
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
147 lines
3.6 KiB
C
147 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* R7S72100 processor support
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*
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* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/lists.h>
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#include <dm/pinctrl.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#define P(bank) (0x0000 + (bank) * 4)
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#define PSR(bank) (0x0100 + (bank) * 4)
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#define PPR(bank) (0x0200 + (bank) * 4)
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#define PM(bank) (0x0300 + (bank) * 4)
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#define PMC(bank) (0x0400 + (bank) * 4)
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#define PFC(bank) (0x0500 + (bank) * 4)
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#define PFCE(bank) (0x0600 + (bank) * 4)
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#define PNOT(bank) (0x0700 + (bank) * 4)
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#define PMSR(bank) (0x0800 + (bank) * 4)
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#define PMCSR(bank) (0x0900 + (bank) * 4)
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#define PFCAE(bank) (0x0A00 + (bank) * 4)
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#define PIBC(bank) (0x4000 + (bank) * 4)
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#define PBDC(bank) (0x4100 + (bank) * 4)
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#define PIPC(bank) (0x4200 + (bank) * 4)
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#define RZA1_PINS_PER_PORT 16
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DECLARE_GLOBAL_DATA_PTR;
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struct r7s72100_pfc_platdata {
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void __iomem *base;
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};
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static void r7s72100_pfc_set_function(struct udevice *dev, u16 bank, u16 line,
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u16 func, u16 inbuf, u16 bidir)
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{
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struct r7s72100_pfc_platdata *plat = dev_get_platdata(dev);
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clrsetbits_le16(plat->base + PFCAE(bank), BIT(line),
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(func & BIT(2)) ? BIT(line) : 0);
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clrsetbits_le16(plat->base + PFCE(bank), BIT(line),
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(func & BIT(1)) ? BIT(line) : 0);
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clrsetbits_le16(plat->base + PFC(bank), BIT(line),
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(func & BIT(0)) ? BIT(line) : 0);
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clrsetbits_le16(plat->base + PIBC(bank), BIT(line),
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inbuf ? BIT(line) : 0);
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clrsetbits_le16(plat->base + PBDC(bank), BIT(line),
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bidir ? BIT(line) : 0);
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setbits_le32(plat->base + PMCSR(bank), BIT(line + 16) | BIT(line));
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setbits_le16(plat->base + PIPC(bank), BIT(line));
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}
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static int r7s72100_pfc_set_state(struct udevice *dev, struct udevice *config)
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{
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const void *blob = gd->fdt_blob;
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int node = dev_of_offset(config);
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u32 cells[32];
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u16 bank, line, func;
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int i, count, bidir;
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count = fdtdec_get_int_array_count(blob, node, "pinmux",
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cells, ARRAY_SIZE(cells));
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if (count < 0) {
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printf("%s: bad pinmux array %d\n", __func__, count);
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return -EINVAL;
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}
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if (count > ARRAY_SIZE(cells)) {
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printf("%s: unsupported pinmux array count %d\n",
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__func__, count);
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return -EINVAL;
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}
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for (i = 0 ; i < count; i++) {
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func = (cells[i] >> 16) & 0xf;
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if (func == 0 || func > 8) {
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printf("Invalid cell %i in node %s!\n",
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count, ofnode_get_name(dev_ofnode(config)));
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continue;
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}
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func = (func - 1) & 0x7;
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bank = (cells[i] / RZA1_PINS_PER_PORT) & 0xff;
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line = cells[i] % RZA1_PINS_PER_PORT;
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bidir = 0;
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if (bank == 3 && line == 3 && func == 1)
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bidir = 1;
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r7s72100_pfc_set_function(dev, bank, line, func, 0, bidir);
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}
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return 0;
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}
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const struct pinctrl_ops r7s72100_pfc_ops = {
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.set_state = r7s72100_pfc_set_state,
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};
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static int r7s72100_pfc_probe(struct udevice *dev)
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{
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struct r7s72100_pfc_platdata *plat = dev_get_platdata(dev);
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fdt_addr_t addr_base;
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ofnode node;
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addr_base = dev_read_addr(dev);
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if (addr_base == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->base = (void __iomem *)addr_base;
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dev_for_each_subnode(node, dev) {
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struct udevice *cdev;
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if (!ofnode_read_bool(node, "gpio-controller"))
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continue;
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device_bind_driver_to_node(dev, "r7s72100-gpio",
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ofnode_get_name(node),
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node, &cdev);
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}
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return 0;
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}
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static const struct udevice_id r7s72100_pfc_match[] = {
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{ .compatible = "renesas,r7s72100-ports" },
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{}
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};
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U_BOOT_DRIVER(r7s72100_pfc) = {
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.name = "r7s72100_pfc",
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.id = UCLASS_PINCTRL,
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.of_match = r7s72100_pfc_match,
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.probe = r7s72100_pfc_probe,
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.platdata_auto_alloc_size = sizeof(struct r7s72100_pfc_platdata),
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.ops = &r7s72100_pfc_ops,
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};
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