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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
542 lines
14 KiB
C
542 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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/* Memory test
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*
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* General observations:
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* o The recommended test sequence is to test the data lines: if they are
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* broken, nothing else will work properly. Then test the address
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* lines. Finally, test the cells in the memory now that the test
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* program knows that the address and data lines work properly.
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* This sequence also helps isolate and identify what is faulty.
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*
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* o For the address line test, it is a good idea to use the base
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* address of the lowest memory location, which causes a '1' bit to
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* walk through a field of zeros on the address lines and the highest
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* memory location, which causes a '0' bit to walk through a field of
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* '1's on the address line.
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*
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* o Floating buses can fool memory tests if the test routine writes
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* a value and then reads it back immediately. The problem is, the
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* write will charge the residual capacitance on the data bus so the
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* bus retains its state briefely. When the test program reads the
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* value back immediately, the capacitance of the bus can allow it
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* to read back what was written, even though the memory circuitry
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* is broken. To avoid this, the test program should write a test
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* pattern to the target location, write a different pattern elsewhere
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* to charge the residual capacitance in a differnt manner, then read
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* the target location back.
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*
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* o Always read the target location EXACTLY ONCE and save it in a local
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* variable. The problem with reading the target location more than
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* once is that the second and subsequent reads may work properly,
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* resulting in a failed test that tells the poor technician that
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* "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
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* doesn't help him one bit and causes puzzled phone calls. Been there,
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* done that.
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*
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* Data line test:
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* ---------------
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* This tests data lines for shorts and opens by forcing adjacent data
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* to opposite states. Because the data lines could be routed in an
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* arbitrary manner the must ensure test patterns ensure that every case
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* is tested. By using the following series of binary patterns every
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* combination of adjacent bits is test regardless of routing.
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*
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* ...101010101010101010101010
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* ...110011001100110011001100
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* ...111100001111000011110000
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* ...111111110000000011111111
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*
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* Carrying this out, gives us six hex patterns as follows:
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*
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* 0xaaaaaaaaaaaaaaaa
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* 0xcccccccccccccccc
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* 0xf0f0f0f0f0f0f0f0
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* 0xff00ff00ff00ff00
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* 0xffff0000ffff0000
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* 0xffffffff00000000
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*
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* To test for short and opens to other signals on our boards, we
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* simply test with the 1's complemnt of the paterns as well, resulting
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* in twelve patterns total.
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*
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* After writing a test pattern. a special pattern 0x0123456789ABCDEF is
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* written to a different address in case the data lines are floating.
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* Thus, if a byte lane fails, you will see part of the special
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* pattern in that byte lane when the test runs. For example, if the
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* xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
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* (for the 'a' test pattern).
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*
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* Address line test:
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* ------------------
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* This function performs a test to verify that all the address lines
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* hooked up to the RAM work properly. If there is an address line
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* fault, it usually shows up as two different locations in the address
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* map (related by the faulty address line) mapping to one physical
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* memory storage location. The artifact that shows up is writing to
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* the first location "changes" the second location.
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*
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* To test all address lines, we start with the given base address and
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* xor the address with a '1' bit to flip one address line. For each
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* test, we shift the '1' bit left to test the next address line.
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*
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* In the actual code, we start with address sizeof(ulong) since our
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* test pattern we use is a ulong and thus, if we tried to test lower
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* order address bits, it wouldn't work because our pattern would
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* overwrite itself.
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*
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* Example for a 4 bit address space with the base at 0000:
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* 0000 <- base
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* 0001 <- test 1
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* 0010 <- test 2
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* 0100 <- test 3
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* 1000 <- test 4
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* Example for a 4 bit address space with the base at 0010:
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* 0010 <- base
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* 0011 <- test 1
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* 0000 <- (below the base address, skipped)
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* 0110 <- test 2
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* 1010 <- test 3
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*
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* The test locations are successively tested to make sure that they are
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* not "mirrored" onto the base address due to a faulty address line.
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* Note that the base and each test location are related by one address
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* line flipped. Note that the base address need not be all zeros.
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*
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* Memory tests 1-4:
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* -----------------
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* These tests verify RAM using sequential writes and reads
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* to/from RAM. There are several test cases that use different patterns to
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* verify RAM. Each test case fills a region of RAM with one pattern and
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* then reads the region back and compares its contents with the pattern.
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* The following patterns are used:
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*
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* 1a) zero pattern (0x00000000)
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* 1b) negative pattern (0xffffffff)
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* 1c) checkerboard pattern (0x55555555)
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* 1d) checkerboard pattern (0xaaaaaaaa)
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* 2) bit-flip pattern ((1 << (offset % 32))
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* 3) address pattern (offset)
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* 4) address pattern (~offset)
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*
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* Being run in normal mode, the test verifies only small 4Kb
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* regions of RAM around each 1Mb boundary. For example, for 64Mb
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* RAM the following areas are verified: 0x00000000-0x00000800,
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* 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
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* 0x04000000. If the test is run in slow-test mode, it verifies
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* the whole RAM.
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*/
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#include <post.h>
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#include <watchdog.h>
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#if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Define INJECT_*_ERRORS for testing error detection in the presence of
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* _good_ hardware.
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*/
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#undef INJECT_DATA_ERRORS
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#undef INJECT_ADDRESS_ERRORS
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#ifdef INJECT_DATA_ERRORS
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#warning "Injecting data line errors for testing purposes"
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#endif
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#ifdef INJECT_ADDRESS_ERRORS
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#warning "Injecting address line errors for testing purposes"
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#endif
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/*
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* This function performs a double word move from the data at
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* the source pointer to the location at the destination pointer.
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* This is helpful for testing memory on processors which have a 64 bit
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* wide data bus.
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*
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* On those PowerPC with FPU, use assembly and a floating point move:
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* this does a 64 bit move.
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*
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* For other processors, let the compiler generate the best code it can.
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*/
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static void move64(const unsigned long long *src, unsigned long long *dest)
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{
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*dest = *src;
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}
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/*
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* This is 64 bit wide test patterns. Note that they reside in ROM
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* (which presumably works) and the tests write them to RAM which may
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* not work.
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*
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* The "otherpattern" is written to drive the data bus to values other
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* than the test pattern. This is for detecting floating bus lines.
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*
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*/
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const static unsigned long long pattern[] = {
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0xaaaaaaaaaaaaaaaaULL,
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0xccccccccccccccccULL,
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0xf0f0f0f0f0f0f0f0ULL,
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0xff00ff00ff00ff00ULL,
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0xffff0000ffff0000ULL,
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0xffffffff00000000ULL,
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0x00000000ffffffffULL,
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0x0000ffff0000ffffULL,
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0x00ff00ff00ff00ffULL,
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0x0f0f0f0f0f0f0f0fULL,
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0x3333333333333333ULL,
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0x5555555555555555ULL
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};
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const unsigned long long otherpattern = 0x0123456789abcdefULL;
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static int memory_post_dataline(unsigned long long * pmem)
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{
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unsigned long long temp64 = 0;
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int num_patterns = ARRAY_SIZE(pattern);
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int i;
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unsigned int hi, lo, pathi, patlo;
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int ret = 0;
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for ( i = 0; i < num_patterns; i++) {
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move64(&(pattern[i]), pmem++);
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/*
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* Put a different pattern on the data lines: otherwise they
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* may float long enough to read back what we wrote.
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*/
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move64(&otherpattern, pmem--);
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move64(pmem, &temp64);
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#ifdef INJECT_DATA_ERRORS
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temp64 ^= 0x00008000;
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#endif
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if (temp64 != pattern[i]){
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pathi = (pattern[i]>>32) & 0xffffffff;
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patlo = pattern[i] & 0xffffffff;
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hi = (temp64>>32) & 0xffffffff;
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lo = temp64 & 0xffffffff;
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post_log("Memory (data line) error at %08x, "
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"wrote %08x%08x, read %08x%08x !\n",
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pmem, pathi, patlo, hi, lo);
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ret = -1;
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}
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}
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return ret;
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}
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static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
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{
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ulong *target;
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ulong *end;
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ulong readback;
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ulong xor;
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int ret = 0;
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end = (ulong *)((ulong)base + size); /* pointer arith! */
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xor = 0;
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for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
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target = (ulong *)((ulong)testaddr ^ xor);
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if((target >= base) && (target < end)) {
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*testaddr = ~*target;
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readback = *target;
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#ifdef INJECT_ADDRESS_ERRORS
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if(xor == 0x00008000) {
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readback = *testaddr;
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}
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#endif
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if(readback == *testaddr) {
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post_log("Memory (address line) error at %08x<->%08x, "
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"XOR value %08x !\n",
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testaddr, target, xor);
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ret = -1;
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}
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}
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}
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return ret;
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}
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static int memory_post_test1(unsigned long start,
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unsigned long size,
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unsigned long val)
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{
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unsigned long i;
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ulong *mem = (ulong *) start;
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ulong readback;
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int ret = 0;
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for (i = 0; i < size / sizeof (ulong); i++) {
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mem[i] = val;
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
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readback = mem[i];
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if (readback != val) {
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post_log("Memory error at %08x, "
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"wrote %08x, read %08x !\n",
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mem + i, val, readback);
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ret = -1;
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break;
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}
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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return ret;
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}
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static int memory_post_test2(unsigned long start, unsigned long size)
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{
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unsigned long i;
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ulong *mem = (ulong *) start;
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ulong readback;
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int ret = 0;
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for (i = 0; i < size / sizeof (ulong); i++) {
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mem[i] = 1 << (i % 32);
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
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readback = mem[i];
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if (readback != (1 << (i % 32))) {
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post_log("Memory error at %08x, "
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"wrote %08x, read %08x !\n",
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mem + i, 1 << (i % 32), readback);
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ret = -1;
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break;
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}
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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return ret;
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}
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static int memory_post_test3(unsigned long start, unsigned long size)
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{
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unsigned long i;
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ulong *mem = (ulong *) start;
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ulong readback;
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int ret = 0;
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for (i = 0; i < size / sizeof (ulong); i++) {
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mem[i] = i;
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
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readback = mem[i];
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if (readback != i) {
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post_log("Memory error at %08x, "
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"wrote %08x, read %08x !\n",
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mem + i, i, readback);
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ret = -1;
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break;
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}
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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return ret;
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}
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static int memory_post_test4(unsigned long start, unsigned long size)
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{
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unsigned long i;
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ulong *mem = (ulong *) start;
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ulong readback;
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int ret = 0;
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for (i = 0; i < size / sizeof (ulong); i++) {
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mem[i] = ~i;
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
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readback = mem[i];
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if (readback != ~i) {
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post_log("Memory error at %08x, "
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"wrote %08x, read %08x !\n",
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mem + i, ~i, readback);
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ret = -1;
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break;
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}
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if (i % 1024 == 0)
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WATCHDOG_RESET();
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}
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return ret;
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}
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static int memory_post_test_lines(unsigned long start, unsigned long size)
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{
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int ret = 0;
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ret = memory_post_dataline((unsigned long long *)start);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_addrline((ulong *)start, (ulong *)start,
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size);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_addrline((ulong *)(start+size-8),
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(ulong *)start, size);
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WATCHDOG_RESET();
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return ret;
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}
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static int memory_post_test_patterns(unsigned long start, unsigned long size)
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{
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int ret = 0;
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ret = memory_post_test1(start, size, 0x00000000);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_test1(start, size, 0xffffffff);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_test1(start, size, 0x55555555);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_test1(start, size, 0xaaaaaaaa);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_test2(start, size);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_test3(start, size);
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WATCHDOG_RESET();
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if (!ret)
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ret = memory_post_test4(start, size);
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WATCHDOG_RESET();
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return ret;
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}
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static int memory_post_test_regions(unsigned long start, unsigned long size)
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{
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unsigned long i;
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int ret = 0;
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for (i = 0; i < (size >> 20) && (!ret); i++) {
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if (!ret)
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ret = memory_post_test_patterns(start + (i << 20),
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0x800);
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if (!ret)
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ret = memory_post_test_patterns(start + (i << 20) +
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0xff800, 0x800);
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}
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return ret;
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}
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static int memory_post_tests(unsigned long start, unsigned long size)
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{
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int ret = 0;
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ret = memory_post_test_lines(start, size);
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if (!ret)
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ret = memory_post_test_patterns(start, size);
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return ret;
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}
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/*
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* !! this is only valid, if you have contiguous memory banks !!
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*/
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__attribute__((weak))
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int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
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{
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bd_t *bd = gd->bd;
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*vstart = CONFIG_SYS_SDRAM_BASE;
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*size = (gd->ram_size >= 256 << 20 ?
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256 << 20 : gd->ram_size) - (1 << 20);
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/* Limit area to be tested with the board info struct */
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if ((*vstart) + (*size) > (ulong)bd)
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*size = (ulong)bd - *vstart;
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return 0;
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}
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__attribute__((weak))
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int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
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{
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return 1;
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}
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__attribute__((weak))
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int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
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{
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return 0;
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}
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__attribute__((weak))
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void arch_memory_failure_handle(void)
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{
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return;
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}
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int memory_regions_post_test(int flags)
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{
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int ret = 0;
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phys_addr_t phys_offset = 0;
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u32 memsize, vstart;
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arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
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ret = memory_post_test_lines(vstart, memsize);
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if (!ret)
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ret = memory_post_test_regions(vstart, memsize);
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return ret;
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}
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|
int memory_post_test(int flags)
|
|
{
|
|
int ret = 0;
|
|
phys_addr_t phys_offset = 0;
|
|
u32 memsize, vstart;
|
|
|
|
arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
|
|
|
|
do {
|
|
if (flags & POST_SLOWTEST) {
|
|
ret = memory_post_tests(vstart, memsize);
|
|
} else { /* POST_NORMAL */
|
|
ret = memory_post_test_regions(vstart, memsize);
|
|
}
|
|
} while (!ret &&
|
|
!arch_memory_test_advance(&vstart, &memsize, &phys_offset));
|
|
|
|
arch_memory_test_cleanup(&vstart, &memsize, &phys_offset);
|
|
if (ret)
|
|
arch_memory_failure_handle();
|
|
|
|
return ret;
|
|
}
|
|
|
|
#endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */
|