u-boot/arch/powerpc
Boschung, Rainer 60b295672d powerpc: macros for e500mc timer regs added
For e500mc cores the watchdog timer period has to be set by means of a
6bit value, that defines the bit of the timebase counter used to signal
a watchdog timer exception on its 0 to 1 transition.
The macro used to set the watchdog period TCR_WP, was redefined for e500mc
to support 6 WP setting.

The parameter (x) given to the macro specifies the prescaling factor of
the time base clock (fTB):

watchdog_period = 1/fTB * 2^x

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-08-01 14:18:07 -07:00
..
cpu mpc85xx: fix interrupt init to not affect watchdog 2014-08-01 14:17:44 -07:00
include/asm powerpc: macros for e500mc timer regs added 2014-08-01 14:18:07 -07:00
lib mpc85xx/t104x: Enable L2 and CPC cache when resume 2014-07-22 16:25:55 -07:00
config.mk kbuild: move "checkgcc4" to PowerPC archprepare 2014-03-07 10:59:07 -05:00