u-boot/configs/ls2088ardb_tfa_defconfig
Simon Glass 984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00

116 lines
2.9 KiB
Text

CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_TFABOOT=y
CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
CONFIG_QSPI_AHB_INIT=y
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
CONFIG_ENV_ADDR=0x580500000
CONFIG_AHCI=y
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_VID=y
CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv"
CONFIG_VOL_MONITOR_IR36021_READ=y
CONFIG_VOL_MONITOR_IR36021_SET=y
CONFIG_FSL_QIXIS=y
# CONFIG_QIXIS_I2C_ACCESS is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="DPMAC1@xgmii"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SATA=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DIMM_SLOTS_PER_CTLR=2
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_FSL_DDR_INTLV_256B=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_EMPTY_INFO=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_FLASH_QUIET_TEST=y
CONFIG_SYS_MAX_FLASH_SECT=1024
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_DM_SPI_FLASH=y
# CONFIG_SPI_FLASH_BAR is not set
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_FSL_MEMAC=y
CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME_PCI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y