mirror of
https://github.com/AsahiLinux/u-boot
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5bef6fd79f
This patch adds the driver for the Designware master SPI controller. This IP core is integrated on the Altera SoCFPGA. This implementation is a driver model (DM) implementation. So multiple SPI drivers can be used. Thats necessary, since SoCFPGA also integrates the Cadence QSPI controller used to connect the SPI NOR flashes. Without DM, using multiple SPI drivers is not possible. This driver is very loosely based on the Linux driver. Most of the Linux driver is removed. Only the polling loop for the transfer is really used from this driver, as we don't support interrupts and DMA right now. This is tested on the SoCrates SoCFPGA board using the SPI pins on the P14 header. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
51 lines
1.8 KiB
Makefile
51 lines
1.8 KiB
Makefile
#
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# (C) Copyright 2000-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# There are many options which enable SPI, so make this library available
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ifdef CONFIG_DM_SPI
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obj-y += spi-uclass.o
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obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
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obj-$(CONFIG_SOFT_SPI) += soft_spi.o
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else
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obj-y += spi.o
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obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
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endif
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obj-$(CONFIG_EP93XX_SPI) += ep93xx_spi.o
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obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
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obj-$(CONFIG_ANDES_SPI) += andes_spi.o
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obj-$(CONFIG_ARMADA100_SPI) += armada100_spi.o
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obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
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obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
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obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
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obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
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obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
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obj-$(CONFIG_CF_SPI) += cf_spi.o
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obj-$(CONFIG_CF_QSPI) += cf_qspi.o
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obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
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obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
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obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
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obj-$(CONFIG_FTSSP010_SPI) += ftssp010_spi.o
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obj-$(CONFIG_ICH_SPI) += ich.o
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obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
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obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
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obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
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obj-$(CONFIG_MXC_SPI) += mxc_spi.o
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obj-$(CONFIG_MXS_SPI) += mxs_spi.o
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obj-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
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obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
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obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
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obj-$(CONFIG_SH_SPI) += sh_spi.o
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obj-$(CONFIG_SH_QSPI) += sh_qspi.o
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obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
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obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
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obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
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obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
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obj-$(CONFIG_TI_QSPI) += ti_qspi.o
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obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
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obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
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obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o
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