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6016194371
In nand_davinci_readecc(), select the correct NANDF<n>ECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the usage in nand_davinci_enable_hwecc(), which already had the correct handling, and allows refactoring to a single function encapsulating the register read. Without this fix, writing NAND pages to a chip not wired to CS2 would result in in the ECC calculation always returning FFFFFF for each 512-byte segment, and reading back a correctly written page (one with ECC intact) would always fail. With this fix, the ECC is written and verified correctly. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
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bios_emulator | ||
block | ||
dma | ||
fpga | ||
gpio | ||
hwmon | ||
i2c | ||
input | ||
misc | ||
mmc | ||
mtd | ||
net | ||
pci | ||
pcmcia | ||
power | ||
qe | ||
rtc | ||
serial | ||
spi | ||
twserial | ||
usb | ||
video | ||
watchdog |