u-boot/configs/octeontx2_96xx_defconfig
Tero Kristo 2509493cc1 net: convert TFTP_TSIZE to proper Kconfig option
TFTP transfer size can be used to re-size the TFTP progress bar on
single line based on the server reported file size. The support for
this has been around from 2019, but it was never converted to proper
Kconfig.

While adding this new Kconfig, enable it by default for OMAP2+ and K3
devices also.

Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-08 21:38:51 -04:00

134 lines
3 KiB
Text

CONFIG_ARM=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_OCTEONTX2=y
CONFIG_SYS_TEXT_BASE=0x04000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0xF00000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_TARGET_OCTEONTX2_96XX=y
CONFIG_DM_GPIO=y
CONFIG_DEBUG_UART_BASE=0x87e028000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_SHA1SUM=y
CONFIG_SHA1SUM_VERIFY=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_BKOPS_ENABLE=y
CONFIG_CMD_PART=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
CONFIG_CMD_WDT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_CMD_PXE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
CONFIG_USE_ENV_SPI_CS=y
CONFIG_ENV_SPI_CS=0
CONFIG_USE_ENV_SPI_MAX_HZ=y
CONFIG_ENV_SPI_MAX_HZ=125000000
CONFIG_USE_ENV_SPI_MODE=y
CONFIG_ENV_SPI_MODE=0x0
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TFTP_TSIZE=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_OCTEONTX=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0x0
CONFIG_SF_DEFAULT_SPEED=125000000
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
CONFIG_E1000_SPI=y
CONFIG_CMD_E1000=y
CONFIG_NET_OCTEONTX2=y
CONFIG_OCTEONTX_SMI=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SRIOV=y
CONFIG_PCI_ARID=y
CONFIG_PCI_OCTEONTX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_OCTEON_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_WDT=y
CONFIG_ERRNO_STR=y