mirror of
https://github.com/AsahiLinux/u-boot
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14f643d1a2
Add Apollo Lake ASL files, taken from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
50 lines
1.3 KiB
Text
50 lines
1.3 KiB
Text
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 Intel Corp.
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* (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.)
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*/
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#ifndef _SOC_INT_DEFINE_ASL_
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#define _SOC_INT_DEFINE_ASL_
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#define SDCARD_INT 3 /* Need to be shared by PMC and SCC only*/
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#define UART0_INT 4 /* Need to be shared by PMC and SCC only*/
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#define UART1_INT 5 /* Need to be shared by PMC and SCC only*/
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#define UART2_INT 6 /* Need to be shared by PMC and SCC only*/
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#define UART3_INT 7 /* Need to be shared by PMC and SCC only*/
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#define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/
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#define GPIO_BANK_INT 14
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#define NPK_INT 16
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#define PIRQA_INT 16
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#define PIRQB_INT 17
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#define PIRQC_INT 18
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#define SATA_INT 19
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#define GEN_INT 19
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#define PIRQD_INT 19
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#define XHCI_INT 17 /* Need to be shared by PMC and SCC only*/
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#define SMBUS_INT 20 /* PIRQE */
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#define CSE_INT 20 /* PIRQE */
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#define IUNIT_INT 21 /* PIRQF */
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#define PIRQF_INT 21
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#define PIRQG_INT 22
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#define PUNIT_INT 24
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#define AUDIO_INT 25
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#define ISH_INT 26
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#define I2C0_INT 27
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#define I2C1_INT 28
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#define I2C2_INT 29
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#define I2C3_INT 30
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#define I2C4_INT 31
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#define I2C5_INT 32
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#define I2C6_INT 33
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#define I2C7_INT 34
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#define SPI0_INT 35
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#define SPI1_INT 36
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#define SPI2_INT 37
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#define UFS_INT 38
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#define EMMC_INT 39
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#define PMC_INT 40
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#define SDIO_INT 42
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#define CNVI_INT 44
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#endif /* _SOC_INT_DEFINE_ASL_ */
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