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https://github.com/AsahiLinux/u-boot
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02560b1368
Use the ALIGN() for size align so that the code is more readable. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
403 lines
11 KiB
C
403 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
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*
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* Reference documents:
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* Cyclone V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
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* Arria V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-v/av_5400a.pdf
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* Arria 10 SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_5400a.pdf
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*
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* Bootable SoCFPGA image requires a structure of the following format
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* positioned at offset 0x40 of the bootable image. Endian is LSB.
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*
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* There are two versions of the SoCFPGA header format, v0 and v1.
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* The version 0 is used by Cyclone V SoC and Arria V SoC, while
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* the version 1 is used by the Arria 10 SoC.
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*
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* Version 0:
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* Offset Length Usage
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* -----------------------
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* 0x40 4 Validation word (0x31305341)
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* 0x44 1 Version (0x0)
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* 0x45 1 Flags (unused, zero is fine)
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* 0x46 2 Length (in units of u32, including the end checksum).
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* 0x48 2 Zero (0x0)
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* 0x4A 2 Checksum over the header. NB Not CRC32
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*
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* Version 1:
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* Offset Length Usage
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* -----------------------
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* 0x40 4 Validation word (0x31305341)
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* 0x44 1 Version (0x1)
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* 0x45 1 Flags (unused, zero is fine)
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* 0x46 2 Header length (in units of u8).
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* 0x48 4 Length (in units of u8).
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* 0x4C 4 Image entry offset from standard of header
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* 0x50 2 Zero (0x0)
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* 0x52 2 Checksum over the header. NB Not CRC32
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*
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* At the end of the code we have a 32-bit CRC checksum over whole binary
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* excluding the CRC.
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*
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* Note that the CRC used here is **not** the zlib/Adler crc32. It is the
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* CRC-32 used in bzip2, ethernet and elsewhere.
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*
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* The Image entry offset in version 1 image is relative the the start of
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* the header, 0x40, and must not be a negative number. Therefore, it is
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* only possible to make the SoCFPGA jump forward. The U-Boot bootloader
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* places a trampoline instruction at offset 0x5c, 0x14 bytes from the
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* start of the SoCFPGA header, which jumps to the reset vector.
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*
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* The image is padded out to 64k, because that is what is
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* typically used to write the image to the boot medium.
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*/
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#include "pbl_crc32.h"
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#include "imagetool.h"
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#include "mkimage.h"
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#include <u-boot/crc.h>
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#include <image.h>
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#define HEADER_OFFSET 0x40
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#define VALIDATION_WORD 0x31305341
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static uint8_t buffer_v0[0x10000];
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static uint8_t buffer_v1[0x40000];
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struct socfpga_header_v0 {
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uint32_t validation;
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uint8_t version;
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uint8_t flags;
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uint16_t length_u32;
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uint16_t zero;
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uint16_t checksum;
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};
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struct socfpga_header_v1 {
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uint32_t validation;
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uint8_t version;
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uint8_t flags;
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uint16_t header_u8;
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uint32_t length_u8;
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uint32_t entry_offset;
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uint16_t zero;
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uint16_t checksum;
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};
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static unsigned int sfp_hdr_size(uint8_t ver)
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{
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if (ver == 0)
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return sizeof(struct socfpga_header_v0);
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if (ver == 1)
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return sizeof(struct socfpga_header_v1);
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return 0;
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}
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static unsigned int sfp_pad_size(uint8_t ver)
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{
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if (ver == 0)
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return sizeof(buffer_v0);
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if (ver == 1)
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return sizeof(buffer_v1);
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return 0;
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}
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/*
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* The header checksum is just a very simple checksum over
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* the header area.
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* There is still a crc32 over the whole lot.
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*/
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static uint16_t sfp_hdr_checksum(uint8_t *buf, unsigned char ver)
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{
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uint16_t ret = 0;
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int len = sfp_hdr_size(ver) - sizeof(ret);
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while (--len)
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ret += *buf++;
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return ret;
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}
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static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
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uint32_t length_bytes)
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{
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struct socfpga_header_v0 header_v0 = {
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.validation = cpu_to_le32(VALIDATION_WORD),
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.version = 0,
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.flags = flags,
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.length_u32 = cpu_to_le16(length_bytes / 4),
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.zero = 0,
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};
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struct socfpga_header_v1 header_v1 = {
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.validation = cpu_to_le32(VALIDATION_WORD),
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.version = 1,
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.flags = flags,
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.header_u8 = cpu_to_le16(sizeof(header_v1)),
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.length_u8 = cpu_to_le32(length_bytes),
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.entry_offset = cpu_to_le32(0x14), /* Trampoline offset */
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.zero = 0,
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};
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uint16_t csum;
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if (ver == 0) {
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csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
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header_v0.checksum = cpu_to_le16(csum);
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memcpy(buf, &header_v0, sizeof(header_v0));
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} else {
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csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
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header_v1.checksum = cpu_to_le16(csum);
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memcpy(buf, &header_v1, sizeof(header_v1));
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}
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}
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/*
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* Perform a rudimentary verification of header and return
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* size of image.
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*/
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static int sfp_verify_header(const uint8_t *buf, uint8_t *ver)
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{
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struct socfpga_header_v0 header_v0;
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struct socfpga_header_v1 header_v1;
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uint16_t hdr_csum, sfp_csum;
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uint32_t img_len;
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/*
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* Header v0 is always smaller than Header v1 and the validation
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* word and version field is at the same place, so use Header v0
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* to check for version during verifiction and upgrade to Header
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* v1 if needed.
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*/
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memcpy(&header_v0, buf, sizeof(header_v0));
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if (le32_to_cpu(header_v0.validation) != VALIDATION_WORD)
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return -1;
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if (header_v0.version == 0) {
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hdr_csum = le16_to_cpu(header_v0.checksum);
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sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
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img_len = le16_to_cpu(header_v0.length_u32) * 4;
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} else if (header_v0.version == 1) {
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memcpy(&header_v1, buf, sizeof(header_v1));
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hdr_csum = le16_to_cpu(header_v1.checksum);
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sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
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img_len = le32_to_cpu(header_v1.length_u8);
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} else { /* Invalid version */
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return -EINVAL;
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}
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/* Verify checksum */
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if (hdr_csum != sfp_csum)
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return -EINVAL;
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*ver = header_v0.version;
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return img_len;
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}
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/* Sign the buffer and return the signed buffer size */
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static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
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int len, int pad_64k)
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{
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uint32_t calc_crc;
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/* Align the length up */
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len = ALIGN(len, 4);
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/* Build header, adding 4 bytes to length to hold the CRC32. */
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sfp_build_header(buf + HEADER_OFFSET, ver, flags, len + 4);
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/* Calculate and apply the CRC */
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calc_crc = ~pbl_crc32(0, (char *)buf, len);
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*((uint32_t *)(buf + len)) = cpu_to_le32(calc_crc);
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if (!pad_64k)
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return len + 4;
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return sfp_pad_size(ver);
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}
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/* Verify that the buffer looks sane */
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static int sfp_verify_buffer(const uint8_t *buf)
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{
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int len; /* Including 32bit CRC */
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uint32_t calc_crc;
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uint32_t buf_crc;
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uint8_t ver = 0;
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len = sfp_verify_header(buf + HEADER_OFFSET, &ver);
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if (len < 0) {
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debug("Invalid header\n");
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return -1;
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}
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if (len < HEADER_OFFSET || len > sfp_pad_size(ver)) {
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debug("Invalid header length (%i)\n", len);
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return -1;
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}
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/*
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* Adjust length to the base of the CRC.
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* Check the CRC.
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*/
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len -= 4;
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calc_crc = ~pbl_crc32(0, (const char *)buf, len);
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buf_crc = le32_to_cpu(*((uint32_t *)(buf + len)));
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if (buf_crc != calc_crc) {
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fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
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buf_crc, calc_crc);
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return -1;
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}
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return 0;
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}
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/* mkimage glue functions */
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static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
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struct image_tool_params *params)
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{
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if (image_size < 0x80)
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return -1;
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return sfp_verify_buffer(ptr);
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}
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static void socfpgaimage_print_header(const void *ptr)
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{
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if (sfp_verify_buffer(ptr) == 0)
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printf("Looks like a sane SOCFPGA preloader\n");
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else
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printf("Not a sane SOCFPGA preloader\n");
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}
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static int socfpgaimage_check_params(struct image_tool_params *params)
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{
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/* Not sure if we should be accepting fflags */
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return (params->dflag && (params->fflag || params->lflag)) ||
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(params->fflag && (params->dflag || params->lflag)) ||
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(params->lflag && (params->dflag || params->fflag));
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}
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static int socfpgaimage_check_image_types_v0(uint8_t type)
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{
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if (type == IH_TYPE_SOCFPGAIMAGE)
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return EXIT_SUCCESS;
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return EXIT_FAILURE;
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}
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static int socfpgaimage_check_image_types_v1(uint8_t type)
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{
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if (type == IH_TYPE_SOCFPGAIMAGE_V1)
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return EXIT_SUCCESS;
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return EXIT_FAILURE;
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}
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/*
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* To work in with the mkimage framework, we do some ugly stuff...
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*
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* First, socfpgaimage_vrec_header() is called.
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* We prepend a fake header big enough to make the file sfp_pad_size().
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* This gives us enough space to do what we want later.
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*
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* Next, socfpgaimage_set_header() is called.
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* We fix up the buffer by moving the image to the start of the buffer.
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* We now have some room to do what we need (add CRC and padding).
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*/
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static int data_size;
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static int sfp_fake_header_size(unsigned int size, uint8_t ver)
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{
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return sfp_pad_size(ver) - size;
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}
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static int sfp_vrec_header(struct image_tool_params *params,
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struct image_type_params *tparams, uint8_t ver)
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{
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struct stat sbuf;
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if (params->datafile &&
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stat(params->datafile, &sbuf) == 0 &&
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sbuf.st_size <= (sfp_pad_size(ver) - sizeof(uint32_t))) {
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data_size = sbuf.st_size;
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tparams->header_size = sfp_fake_header_size(data_size, ver);
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}
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return 0;
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}
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static int socfpgaimage_vrec_header_v0(struct image_tool_params *params,
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struct image_type_params *tparams)
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{
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return sfp_vrec_header(params, tparams, 0);
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}
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static int socfpgaimage_vrec_header_v1(struct image_tool_params *params,
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struct image_type_params *tparams)
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{
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return sfp_vrec_header(params, tparams, 1);
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}
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static void sfp_set_header(void *ptr, unsigned char ver)
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{
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uint8_t *buf = (uint8_t *)ptr;
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/*
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* This function is called after vrec_header() has been called.
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* At this stage we have the sfp_fake_header_size() dummy bytes
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* followed by data_size image bytes. Total = sfp_pad_size().
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* We need to fix the buffer by moving the image bytes back to
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* the beginning of the buffer, then actually do the signing stuff...
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*/
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memmove(buf, buf + sfp_fake_header_size(data_size, ver), data_size);
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memset(buf + data_size, 0, sfp_fake_header_size(data_size, ver));
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sfp_sign_buffer(buf, ver, 0, data_size, 0);
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}
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static void socfpgaimage_set_header_v0(void *ptr, struct stat *sbuf, int ifd,
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struct image_tool_params *params)
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{
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sfp_set_header(ptr, 0);
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}
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static void socfpgaimage_set_header_v1(void *ptr, struct stat *sbuf, int ifd,
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struct image_tool_params *params)
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{
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sfp_set_header(ptr, 1);
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}
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U_BOOT_IMAGE_TYPE(
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socfpgaimage,
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"Altera SoCFPGA Cyclone V / Arria V image support",
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0, /* This will be modified by vrec_header() */
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(void *)buffer_v0,
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socfpgaimage_check_params,
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socfpgaimage_verify_header,
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socfpgaimage_print_header,
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socfpgaimage_set_header_v0,
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NULL,
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socfpgaimage_check_image_types_v0,
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NULL,
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socfpgaimage_vrec_header_v0
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);
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U_BOOT_IMAGE_TYPE(
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socfpgaimage_v1,
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"Altera SoCFPGA Arria10 image support",
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0, /* This will be modified by vrec_header() */
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(void *)buffer_v1,
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socfpgaimage_check_params,
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socfpgaimage_verify_header,
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socfpgaimage_print_header,
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socfpgaimage_set_header_v1,
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NULL,
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socfpgaimage_check_image_types_v1,
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NULL,
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socfpgaimage_vrec_header_v1
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);
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