Markus Hoffrogge 5fd30ed785 sunxi-nand: fix the PIO instead of DMA implementation ... The sunxi nand SPL loader was broken at least for SUN4I, SUN5I and SUN7I SOCs since the implementation change from DMA to PIO usage - commit 6ddbb1e. Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD being set by method nand_apply_config. This flag controls the bus being used for the NFCs internal RAM access. It must be set for the DMA use case only. See A33_Nand_Flash_Controller_Specification.pdf page 12. This fix is tested by myself on a Cubietruck A20 board. Others should test it on new generation SOCs as well. Signed-off-by: Markus Hoffrogge <mhoffrogge@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2022-07-18 11:34:26 +01:00
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raw	sunxi-nand: fix the PIO instead of DMA implementation	2022-07-18 11:34:26 +01:00
spi	mtd: spinand: macronix: Fix ECC Status Read	2021-10-08 17:59:34 +05:30
bbt.c	Fix corner case in bad block table handling.	2020-08-04 23:30:02 -04:00
core.c	mtd: nand: Add WATCHDOG_RESET() in nanddev_mtd_erase()	2021-03-11 16:59:16 +01:00
Kconfig	mtd: nand: Add core infrastructure to support SPI NANDs	2018-09-20 20:10:49 +05:30
Makefile	mtd: Makefile: deep cleanup	2019-12-04 17:10:51 -05:00