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7dee1848d7
When introducing the SAMA5D27 SoCs, the SAMA5D2 series got an additional
chip id. The check if the cpu is sama5d2 was changed from a preprocessor
definition (inlining a call to 'get_chip_id()') to a C function,
probably to not call get_chip_id twice?
That however broke a check in the macb ethernet driver. That driver is
more generic and also used for other platforms. I suppose this solution
was implemented to use it in 'gem_is_gigabit_capable()', without having
to stricly depend on the at91 platform:
#ifndef cpu_is_sama5d2
#define cpu_is_sama5d2() 0
#endif
That only works as long as cpu_is_sama5d2 is a preprocessor definition.
(The same is still true for sama5d4 by the way.) So this is a straight
forward fix for the workaround.
The not working check on the SAMA5D2 CPU lead to an issue on a custom
board with a LAN8720A ethernet phy connected to the SoC:
=> dhcp
ethernet@f8008000: PHY present at 1
ethernet@f8008000: Starting autonegotiation...
ethernet@f8008000: Autonegotiation complete
ethernet@f8008000: link up, 1000Mbps full-duplex (lpa: 0xffff)
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast 7
BOOTP broadcast 8
BOOTP broadcast 9
BOOTP broadcast 10
BOOTP broadcast 11
BOOTP broadcast 12
BOOTP broadcast 13
BOOTP broadcast 14
BOOTP broadcast 15
BOOTP broadcast 16
BOOTP broadcast 17
Retry time exceeded; starting again
Notice the wrong reported link speed, although both SoC and phy only
support 100 MBit/s!
The real issue on reliably detecting the features of that cadence
ethernet mac IP block, is probably more complicated, though.
Fixes: 245cbc583d ("ARM: at91: Get the Chip ID of SAMA5D2 SiP")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
75 lines
1.7 KiB
C
75 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Atmel Corporation
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* Wenyou Yang <wenyou.yang@atmel.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/sama5d2.h>
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int _cpu_is_sama5d2(void)
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{
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unsigned int chip_id = get_chip_id();
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return ((chip_id == ARCH_ID_SAMA5D2) ||
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(chip_id == ARCH_ID_SAMA5D2_SIP)) ? 1 : 0;
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}
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char *get_cpu_name(void)
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{
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unsigned int chip_id = get_chip_id();
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unsigned int extension_id = get_extension_chip_id();
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if (chip_id == ARCH_ID_SAMA5D2) {
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switch (extension_id) {
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case ARCH_EXID_SAMA5D21CU:
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return "SAMA5D21";
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case ARCH_EXID_SAMA5D22CU:
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return "SAMA5D22-CU";
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case ARCH_EXID_SAMA5D22CN:
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return "SAMA5D22-CN";
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case ARCH_EXID_SAMA5D23CU:
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return "SAMA5D23-CU";
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case ARCH_EXID_SAMA5D24CX:
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return "SAMA5D24-CX";
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case ARCH_EXID_SAMA5D24CU:
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return "SAMA5D24-CU";
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case ARCH_EXID_SAMA5D26CU:
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return "SAMA5D26-CU";
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case ARCH_EXID_SAMA5D27CU:
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return "SAMA5D27-CU";
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case ARCH_EXID_SAMA5D27CN:
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return "SAMA5D27-CN";
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case ARCH_EXID_SAMA5D28CU:
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return "SAMA5D28-CU";
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case ARCH_EXID_SAMA5D28CN:
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return "SAMA5D28-CN";
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}
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}
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if ((chip_id == ARCH_ID_SAMA5D2) || (chip_id == ARCH_ID_SAMA5D2_SIP)) {
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switch (extension_id) {
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case ARCH_EXID_SAMA5D225C_D1M:
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return "SAMA5D225 128M bits DDR2 SDRAM";
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case ARCH_EXID_SAMA5D27C_D5M:
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return "SAMA5D27 512M bits DDR2 SDRAM";
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case ARCH_EXID_SAMA5D27C_D1G:
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return "SAMA5D27 1G bits DDR2 SDRAM";
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case ARCH_EXID_SAMA5D28C_D1G:
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return "SAMA5D28 1G bits DDR2 SDRAM";
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}
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}
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return "Unknown CPU type";
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}
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#ifdef CONFIG_USB_GADGET_ATMEL_USBA
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void at91_udp_hw_init(void)
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{
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at91_upll_clk_enable();
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at91_periph_clk_enable(ATMEL_ID_UDPHS);
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}
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#endif
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