Siva Durga Prasad Paladugu 19ed4b697b fpga: zynqmp: Update zynqmp_load() as per latest xilfpga ... Latest xilfpga expects to set BIT5 of flags for nonsecure bitsream and also expects length in bytes instead of words This patch does the same. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>		2018-04-09 12:14:50 +02:00
..
clk.h	ARM64: zynqmp: Remove get_uart_clk()	2016-07-22 14:04:41 +02:00
gpio.h	zynqmp: Enable SDHCI0 options	2015-04-29 11:19:04 +02:00
hardware.h	arm64: zynqmp: Add support for CG/EG/EV device detection	2017-11-28 16:09:01 +01:00
psu_init_gpl.h	arm64: zynqmp: Prepare psu_init rework	2018-01-30 14:29:18 +01:00
sys_proto.h	fpga: zynqmp: Update zynqmp_load() as per latest xilfpga	2018-04-09 12:14:50 +02:00