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66391263f8
The clock and reset drivers use the exact same platform data. Simplify them by sharing the object. This is safe because the parent device (the clock device) always gets its driver model callbacks run first. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
90 lines
1.6 KiB
C
90 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Amarula Solutions.
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* Author: Jagan Teki <jagan@amarulasolutions.com>
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*/
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#ifndef _CLK_SUNXI_H
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#define _CLK_SUNXI_H
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#include <linux/bitops.h>
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/**
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* enum ccu_flags - ccu clock/reset flags
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*
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* @CCU_CLK_F_IS_VALID: is given clock gate is valid?
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* @CCU_RST_F_IS_VALID: is given reset control is valid?
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*/
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enum ccu_flags {
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CCU_CLK_F_IS_VALID = BIT(0),
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CCU_RST_F_IS_VALID = BIT(1),
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CCU_CLK_F_DUMMY_GATE = BIT(2),
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};
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/**
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* struct ccu_clk_gate - ccu clock gate
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* @off: gate offset
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* @bit: gate bit
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* @flags: ccu clock gate flags
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*/
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struct ccu_clk_gate {
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u16 off;
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u32 bit;
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enum ccu_flags flags;
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};
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#define GATE(_off, _bit) { \
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.off = _off, \
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.bit = _bit, \
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.flags = CCU_CLK_F_IS_VALID, \
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}
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#define GATE_DUMMY { \
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.flags = CCU_CLK_F_DUMMY_GATE, \
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}
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/**
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* struct ccu_reset - ccu reset
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* @off: reset offset
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* @bit: reset bit
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* @flags: ccu reset control flags
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*/
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struct ccu_reset {
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u16 off;
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u32 bit;
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enum ccu_flags flags;
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};
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#define RESET(_off, _bit) { \
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.off = _off, \
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.bit = _bit, \
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.flags = CCU_RST_F_IS_VALID, \
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}
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/**
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* struct ccu_desc - clock control unit descriptor
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*
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* @gates: clock gates
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* @resets: reset unit
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*/
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struct ccu_desc {
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const struct ccu_clk_gate *gates;
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const struct ccu_reset *resets;
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u8 num_gates;
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u8 num_resets;
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};
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/**
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* struct ccu_plat - sunxi clock control unit platform data
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*
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* @base: base address
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* @desc: ccu descriptor
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*/
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struct ccu_plat {
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void *base;
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const struct ccu_desc *desc;
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};
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extern struct clk_ops sunxi_clk_ops;
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#endif /* _CLK_SUNXI_H */
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