mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
c79cbb5952
If for some reason, TSC timer frequency cannot be determined from hardware, nor is it specified in the device tree, U-Boot will panic resulting in endless reset during boot. Let's define a default TSC timer frequency using the Kconfig value CONFIG_X86_TSC_TIMER_FREQ (note: #include must be used instead of /include/ otherwise the macro is not pre-processed). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
180 lines
3.2 KiB
Text
180 lines
3.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2017 Intel Corporation
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/x86-gpio.h>
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#include <dt-bindings/interrupt-router/intel-irq.h>
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/include/ "skeleton.dtsi"
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/include/ "rtc.dtsi"
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#include "tsc_timer.dtsi"
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#include "smbios.dtsi"
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/ {
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model = "Intel Edison";
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compatible = "intel,edison", "intel,tangier";
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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serial2 = &serial2;
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};
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binman: binman {
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multiple-images;
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};
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chosen {
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stdout-path = &serial2;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "cpu-x86";
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reg = <0>;
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intel,apic-id = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "cpu-x86";
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reg = <1>;
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intel,apic-id = <2>;
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};
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};
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pci {
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compatible = "pci-x86";
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#address-cells = <3>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
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0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
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0x01000000 0x0 0x2000 0x2000 0 0xe000>;
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};
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serial0: serial@ff010080 {
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compatible = "intel,mid-uart";
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reg = <0xff010080 0x100>;
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reg-shift = <0>;
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clock-frequency = <29491200>;
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current-speed = <115200>;
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};
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serial1: serial@ff010100 {
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compatible = "intel,mid-uart";
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reg = <0xff010100 0x100>;
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reg-shift = <0>;
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clock-frequency = <29491200>;
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current-speed = <115200>;
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};
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serial2: serial@ff010180 {
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compatible = "intel,mid-uart";
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reg = <0xff010180 0x100>;
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reg-shift = <0>;
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clock-frequency = <29491200>;
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current-speed = <115200>;
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};
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emmc: mmc@ff3fc000 {
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compatible = "intel,sdhci-tangier";
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reg = <0xff3fc000 0x1000>;
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};
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sdcard: mmc@ff3fa000 {
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compatible = "intel,sdhci-tangier";
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reg = <0xff3fa000 0x1000>;
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};
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pmu: power@ff00b000 {
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compatible = "intel,pmu-mid";
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reg = <0xff00b000 0x1000>;
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};
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scu: ipc@ff009000 {
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compatible = "intel,scu-ipc";
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reg = <0xff009000 0x1000>;
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};
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usb: usb@f9100000 {
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compatible = "intel,tangier-dwc3";
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#address-cells = <1>;
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#size-cells = <1>;
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dwc3: dwc3 {
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reg = <0xf9100000 0x100000>;
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maximum-speed = "high-speed";
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dr_mode = "peripheral";
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};
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};
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watchdog: wdt@0 {
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compatible = "intel,tangier-wdt";
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};
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reset {
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compatible = "intel,reset-tangier";
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u-boot,dm-pre-reloc;
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};
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pinctrl {
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compatible = "intel,pinctrl-tangier";
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reg = <0xff0c0000 0x8000>;
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/*
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* Initial configuration came from the firmware.
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* Which quite likely has been used in the phones, where I2C #8,
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* that is not part of Atom peripheral, is in use.
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* Thus we need to override the leftover.
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*/
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i2c6_scl@0 {
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pad-offset = <111>;
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mode-func = <1>;
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protected;
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};
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i2c6_sda@0 {
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pad-offset = <112>;
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mode-func = <1>;
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protected;
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};
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};
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};
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&binman {
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u-boot-edison {
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filename = "u-boot-edison.img";
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/* This is the OSIP */
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blob {
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filename = "edison-osip.dat";
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};
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u-boot {
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offset = <0x200>;
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};
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u-boot-env {
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offset = <0x200200>;
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filename = "edison-environment.txt";
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size = <0x10000>;
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fill-byte = [ff];
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};
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u-boot-env2 {
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type = "u-boot-env";
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offset = <0x500200>;
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filename = "edison-environment.txt";
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size = <0x10000>;
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fill-byte = [ff];
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};
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};
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};
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