mirror of
https://github.com/AsahiLinux/u-boot
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bffd13144b
Place ipuv3 files and headers in custom driver subdirectory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
700 lines
16 KiB
C
700 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Porting to u-boot:
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*
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* (C) Copyright 2010
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de
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*
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* MX51 Linux framebuffer:
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*
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* (C) Copyright 2004-2010 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <linux/errno.h>
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#include <asm/global_data.h>
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#include <linux/string.h>
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#include <linux/list.h>
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#include <linux/fb.h>
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#include <asm/io.h>
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#include <asm/mach-imx/video.h>
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#include <malloc.h>
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#include <video_fb.h>
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#include "../videomodes.h"
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#include "ipu.h"
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#include "mxcfb.h"
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#include "ipu_regs.h"
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#include <dm.h>
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#include <video.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int mxcfb_map_video_memory(struct fb_info *fbi);
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static int mxcfb_unmap_video_memory(struct fb_info *fbi);
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/* graphics setup */
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static GraphicDevice panel;
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static struct fb_videomode const *gmode;
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static uint8_t gdisp;
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static uint32_t gpixfmt;
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static void fb_videomode_to_var(struct fb_var_screeninfo *var,
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const struct fb_videomode *mode)
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{
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var->xres = mode->xres;
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var->yres = mode->yres;
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var->xres_virtual = mode->xres;
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var->yres_virtual = mode->yres;
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var->xoffset = 0;
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var->yoffset = 0;
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var->pixclock = mode->pixclock;
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var->left_margin = mode->left_margin;
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var->right_margin = mode->right_margin;
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var->upper_margin = mode->upper_margin;
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var->lower_margin = mode->lower_margin;
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var->hsync_len = mode->hsync_len;
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var->vsync_len = mode->vsync_len;
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var->sync = mode->sync;
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var->vmode = mode->vmode & FB_VMODE_MASK;
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}
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/*
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* Structure containing the MXC specific framebuffer information.
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*/
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struct mxcfb_info {
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int blank;
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ipu_channel_t ipu_ch;
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int ipu_di;
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u32 ipu_di_pix_fmt;
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unsigned char overlay;
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unsigned char alpha_chan_en;
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dma_addr_t alpha_phy_addr0;
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dma_addr_t alpha_phy_addr1;
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void *alpha_virt_addr0;
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void *alpha_virt_addr1;
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uint32_t alpha_mem_len;
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uint32_t cur_ipu_buf;
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uint32_t cur_ipu_alpha_buf;
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u32 pseudo_palette[16];
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};
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enum {
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BOTH_ON,
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SRC_ON,
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TGT_ON,
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BOTH_OFF
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};
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static unsigned long default_bpp = 16;
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static unsigned char g_dp_in_use;
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static struct fb_info *mxcfb_info[3];
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static int ext_clk_used;
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static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
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{
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uint32_t pixfmt = 0;
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debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel);
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if (fbi->var.nonstd)
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return fbi->var.nonstd;
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switch (fbi->var.bits_per_pixel) {
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case 24:
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pixfmt = IPU_PIX_FMT_BGR24;
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break;
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case 32:
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pixfmt = IPU_PIX_FMT_BGR32;
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break;
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case 16:
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pixfmt = IPU_PIX_FMT_RGB565;
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break;
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}
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return pixfmt;
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}
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/*
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* Set fixed framebuffer parameters based on variable settings.
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*
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* @param info framebuffer information pointer
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*/
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static int mxcfb_set_fix(struct fb_info *info)
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{
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struct fb_fix_screeninfo *fix = &info->fix;
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struct fb_var_screeninfo *var = &info->var;
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fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
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fix->type = FB_TYPE_PACKED_PIXELS;
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fix->accel = FB_ACCEL_NONE;
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fix->visual = FB_VISUAL_TRUECOLOR;
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fix->xpanstep = 1;
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fix->ypanstep = 1;
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return 0;
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}
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static int setup_disp_channel1(struct fb_info *fbi)
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{
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ipu_channel_params_t params;
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struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
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memset(¶ms, 0, sizeof(params));
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params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;
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debug("%s called\n", __func__);
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/*
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* Assuming interlaced means yuv output, below setting also
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* valid for mem_dc_sync. FG should have the same vmode as BG.
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*/
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if (fbi->var.vmode & FB_VMODE_INTERLACED) {
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params.mem_dp_bg_sync.interlaced = 1;
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params.mem_dp_bg_sync.out_pixel_fmt =
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IPU_PIX_FMT_YUV444;
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} else {
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if (mxc_fbi->ipu_di_pix_fmt) {
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params.mem_dp_bg_sync.out_pixel_fmt =
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mxc_fbi->ipu_di_pix_fmt;
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} else {
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params.mem_dp_bg_sync.out_pixel_fmt =
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IPU_PIX_FMT_RGB666;
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}
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}
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params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi);
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if (mxc_fbi->alpha_chan_en)
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params.mem_dp_bg_sync.alpha_chan_en = 1;
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ipu_init_channel(mxc_fbi->ipu_ch, ¶ms);
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return 0;
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}
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static int setup_disp_channel2(struct fb_info *fbi)
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{
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int retval = 0;
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struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
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mxc_fbi->cur_ipu_buf = 1;
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if (mxc_fbi->alpha_chan_en)
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mxc_fbi->cur_ipu_alpha_buf = 1;
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fbi->var.xoffset = fbi->var.yoffset = 0;
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debug("%s: %x %d %d %d %lx %lx\n",
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__func__,
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mxc_fbi->ipu_ch,
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fbi->var.xres,
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fbi->var.yres,
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fbi->fix.line_length,
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fbi->fix.smem_start,
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fbi->fix.smem_start +
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(fbi->fix.line_length * fbi->var.yres));
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retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
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bpp_to_pixfmt(fbi),
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fbi->var.xres, fbi->var.yres,
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fbi->fix.line_length,
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fbi->fix.smem_start +
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(fbi->fix.line_length * fbi->var.yres),
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fbi->fix.smem_start,
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0, 0);
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if (retval)
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printf("ipu_init_channel_buffer error %d\n", retval);
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return retval;
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}
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/*
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* Set framebuffer parameters and change the operating mode.
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*
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* @param info framebuffer information pointer
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*/
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static int mxcfb_set_par(struct fb_info *fbi)
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{
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int retval = 0;
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u32 mem_len;
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ipu_di_signal_cfg_t sig_cfg;
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struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
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uint32_t out_pixel_fmt;
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ipu_disable_channel(mxc_fbi->ipu_ch);
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ipu_uninit_channel(mxc_fbi->ipu_ch);
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mxcfb_set_fix(fbi);
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mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
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if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) {
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if (fbi->fix.smem_start)
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mxcfb_unmap_video_memory(fbi);
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if (mxcfb_map_video_memory(fbi) < 0)
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return -ENOMEM;
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}
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setup_disp_channel1(fbi);
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memset(&sig_cfg, 0, sizeof(sig_cfg));
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if (fbi->var.vmode & FB_VMODE_INTERLACED) {
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sig_cfg.interlaced = 1;
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out_pixel_fmt = IPU_PIX_FMT_YUV444;
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} else {
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if (mxc_fbi->ipu_di_pix_fmt)
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out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
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else
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out_pixel_fmt = IPU_PIX_FMT_RGB666;
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}
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if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
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sig_cfg.odd_field_first = 1;
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if ((fbi->var.sync & FB_SYNC_EXT) || ext_clk_used)
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sig_cfg.ext_clk = 1;
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if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
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sig_cfg.Hsync_pol = 1;
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if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
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sig_cfg.Vsync_pol = 1;
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if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
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sig_cfg.clk_pol = 1;
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if (fbi->var.sync & FB_SYNC_DATA_INVERT)
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sig_cfg.data_pol = 1;
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if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
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sig_cfg.enable_pol = 1;
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if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
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sig_cfg.clkidle_en = 1;
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debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL);
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if (ipu_init_sync_panel(mxc_fbi->ipu_di,
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(PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
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fbi->var.xres, fbi->var.yres,
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out_pixel_fmt,
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fbi->var.left_margin,
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fbi->var.hsync_len,
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fbi->var.right_margin,
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fbi->var.upper_margin,
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fbi->var.vsync_len,
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fbi->var.lower_margin,
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0, sig_cfg) != 0) {
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puts("mxcfb: Error initializing panel.\n");
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return -EINVAL;
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}
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retval = setup_disp_channel2(fbi);
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if (retval)
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return retval;
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if (mxc_fbi->blank == FB_BLANK_UNBLANK)
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ipu_enable_channel(mxc_fbi->ipu_ch);
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return retval;
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}
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/*
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* Check framebuffer variable parameters and adjust to valid values.
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*
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* @param var framebuffer variable parameters
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*
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* @param info framebuffer information pointer
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*/
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static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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u32 vtotal;
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u32 htotal;
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if (var->xres_virtual < var->xres)
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var->xres_virtual = var->xres;
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if (var->yres_virtual < var->yres)
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var->yres_virtual = var->yres;
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if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
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(var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
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var->bits_per_pixel = default_bpp;
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switch (var->bits_per_pixel) {
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case 8:
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var->red.length = 3;
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var->red.offset = 5;
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var->red.msb_right = 0;
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var->green.length = 3;
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var->green.offset = 2;
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var->green.msb_right = 0;
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var->blue.length = 2;
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var->blue.offset = 0;
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var->blue.msb_right = 0;
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var->transp.length = 0;
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var->transp.offset = 0;
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var->transp.msb_right = 0;
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break;
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case 16:
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var->red.length = 5;
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var->red.offset = 11;
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var->red.msb_right = 0;
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var->green.length = 6;
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var->green.offset = 5;
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var->green.msb_right = 0;
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var->blue.length = 5;
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var->blue.offset = 0;
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var->blue.msb_right = 0;
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var->transp.length = 0;
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var->transp.offset = 0;
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var->transp.msb_right = 0;
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break;
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case 24:
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var->red.length = 8;
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var->red.offset = 16;
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var->red.msb_right = 0;
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var->green.length = 8;
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var->green.offset = 8;
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var->green.msb_right = 0;
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var->blue.length = 8;
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var->blue.offset = 0;
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var->blue.msb_right = 0;
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var->transp.length = 0;
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var->transp.offset = 0;
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var->transp.msb_right = 0;
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break;
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case 32:
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var->red.length = 8;
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var->red.offset = 16;
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var->red.msb_right = 0;
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var->green.length = 8;
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var->green.offset = 8;
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var->green.msb_right = 0;
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var->blue.length = 8;
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var->blue.offset = 0;
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var->blue.msb_right = 0;
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var->transp.length = 8;
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var->transp.offset = 24;
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var->transp.msb_right = 0;
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break;
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}
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if (var->pixclock < 1000) {
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htotal = var->xres + var->right_margin + var->hsync_len +
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var->left_margin;
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vtotal = var->yres + var->lower_margin + var->vsync_len +
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var->upper_margin;
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var->pixclock = (vtotal * htotal * 6UL) / 100UL;
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var->pixclock = KHZ2PICOS(var->pixclock);
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printf("pixclock set for 60Hz refresh = %u ps\n",
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var->pixclock);
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}
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var->height = -1;
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var->width = -1;
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var->grayscale = 0;
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return 0;
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}
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static int mxcfb_map_video_memory(struct fb_info *fbi)
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{
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if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) {
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fbi->fix.smem_len = fbi->var.yres_virtual *
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fbi->fix.line_length;
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}
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fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN);
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#if CONFIG_IS_ENABLED(DM_VIDEO)
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fbi->screen_base = (char *)gd->video_bottom;
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#else
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fbi->screen_base = (char *)memalign(ARCH_DMA_MINALIGN,
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fbi->fix.smem_len);
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#endif
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fbi->fix.smem_start = (unsigned long)fbi->screen_base;
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if (fbi->screen_base == 0) {
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puts("Unable to allocate framebuffer memory\n");
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fbi->fix.smem_len = 0;
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fbi->fix.smem_start = 0;
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return -EBUSY;
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}
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debug("allocated fb @ paddr=0x%08X, size=%d.\n",
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(uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);
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fbi->screen_size = fbi->fix.smem_len;
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#if CONFIG_IS_ENABLED(VIDEO)
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gd->fb_base = fbi->fix.smem_start;
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#endif
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/* Clear the screen */
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memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
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return 0;
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}
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static int mxcfb_unmap_video_memory(struct fb_info *fbi)
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{
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fbi->screen_base = 0;
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fbi->fix.smem_start = 0;
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fbi->fix.smem_len = 0;
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return 0;
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}
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/*
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* Initializes the framebuffer information pointer. After allocating
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* sufficient memory for the framebuffer structure, the fields are
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* filled with custom information passed in from the configurable
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* structures. This includes information such as bits per pixel,
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* color maps, screen width/height and RGBA offsets.
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*
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* @return Framebuffer structure initialized with our information
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*/
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static struct fb_info *mxcfb_init_fbinfo(void)
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{
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#define BYTES_PER_LONG 4
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#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
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struct fb_info *fbi;
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struct mxcfb_info *mxcfbi;
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char *p;
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int size = sizeof(struct mxcfb_info) + PADDING +
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sizeof(struct fb_info);
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debug("%s: %d %d %d %d\n",
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__func__,
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PADDING,
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size,
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sizeof(struct mxcfb_info),
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sizeof(struct fb_info));
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/*
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* Allocate sufficient memory for the fb structure
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*/
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p = malloc(size);
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if (!p)
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return NULL;
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memset(p, 0, size);
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fbi = (struct fb_info *)p;
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fbi->par = p + sizeof(struct fb_info) + PADDING;
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mxcfbi = (struct mxcfb_info *)fbi->par;
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debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n",
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(unsigned int)fbi, (unsigned int)mxcfbi);
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fbi->var.activate = FB_ACTIVATE_NOW;
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fbi->flags = FBINFO_FLAG_DEFAULT;
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fbi->pseudo_palette = mxcfbi->pseudo_palette;
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|
|
|
return fbi;
|
|
}
|
|
|
|
/*
|
|
* Probe routine for the framebuffer driver. It is called during the
|
|
* driver binding process. The following functions are performed in
|
|
* this routine: Framebuffer initialization, Memory allocation and
|
|
* mapping, Framebuffer registration, IPU initialization.
|
|
*
|
|
* @return Appropriate error code to the kernel common code
|
|
*/
|
|
static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,
|
|
struct fb_videomode const *mode)
|
|
{
|
|
struct fb_info *fbi;
|
|
struct mxcfb_info *mxcfbi;
|
|
int ret = 0;
|
|
|
|
/*
|
|
* Initialize FB structures
|
|
*/
|
|
fbi = mxcfb_init_fbinfo();
|
|
if (!fbi) {
|
|
ret = -ENOMEM;
|
|
goto err0;
|
|
}
|
|
mxcfbi = (struct mxcfb_info *)fbi->par;
|
|
|
|
if (!g_dp_in_use) {
|
|
mxcfbi->ipu_ch = MEM_BG_SYNC;
|
|
mxcfbi->blank = FB_BLANK_UNBLANK;
|
|
} else {
|
|
mxcfbi->ipu_ch = MEM_DC_SYNC;
|
|
mxcfbi->blank = FB_BLANK_POWERDOWN;
|
|
}
|
|
|
|
mxcfbi->ipu_di = disp;
|
|
|
|
ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
|
|
ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);
|
|
strcpy(fbi->fix.id, "DISP3 BG");
|
|
|
|
g_dp_in_use = 1;
|
|
|
|
mxcfb_info[mxcfbi->ipu_di] = fbi;
|
|
|
|
/* Need dummy values until real panel is configured */
|
|
|
|
mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
|
|
fb_videomode_to_var(&fbi->var, mode);
|
|
fbi->var.bits_per_pixel = 16;
|
|
fbi->fix.line_length = fbi->var.xres * (fbi->var.bits_per_pixel / 8);
|
|
fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;
|
|
|
|
mxcfb_check_var(&fbi->var, fbi);
|
|
|
|
/* Default Y virtual size is 2x panel size */
|
|
fbi->var.yres_virtual = fbi->var.yres * 2;
|
|
|
|
mxcfb_set_fix(fbi);
|
|
|
|
/* allocate fb first */
|
|
if (mxcfb_map_video_memory(fbi) < 0)
|
|
return -ENOMEM;
|
|
|
|
mxcfb_set_par(fbi);
|
|
|
|
panel.winSizeX = mode->xres;
|
|
panel.winSizeY = mode->yres;
|
|
panel.plnSizeX = mode->xres;
|
|
panel.plnSizeY = mode->yres;
|
|
|
|
panel.frameAdrs = (u32)fbi->screen_base;
|
|
panel.memSize = fbi->screen_size;
|
|
|
|
panel.gdfBytesPP = 2;
|
|
panel.gdfIndex = GDF_16BIT_565RGB;
|
|
|
|
ipu_dump_registers();
|
|
|
|
return 0;
|
|
|
|
err0:
|
|
return ret;
|
|
}
|
|
|
|
void ipuv3_fb_shutdown(void)
|
|
{
|
|
int i;
|
|
struct ipu_stat *stat = (struct ipu_stat *)IPU_STAT;
|
|
|
|
if (!ipu_clk_enabled())
|
|
return;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mxcfb_info); i++) {
|
|
struct fb_info *fbi = mxcfb_info[i];
|
|
if (fbi) {
|
|
struct mxcfb_info *mxc_fbi = fbi->par;
|
|
ipu_disable_channel(mxc_fbi->ipu_ch);
|
|
ipu_uninit_channel(mxc_fbi->ipu_ch);
|
|
}
|
|
}
|
|
for (i = 0; i < ARRAY_SIZE(stat->int_stat); i++) {
|
|
__raw_writel(__raw_readl(&stat->int_stat[i]),
|
|
&stat->int_stat[i]);
|
|
}
|
|
}
|
|
|
|
void *video_hw_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = ipu_probe();
|
|
if (ret)
|
|
puts("Error initializing IPU\n");
|
|
|
|
ret = mxcfb_probe(gpixfmt, gdisp, gmode);
|
|
debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs);
|
|
|
|
return (void *)&panel;
|
|
}
|
|
|
|
int ipuv3_fb_init(struct fb_videomode const *mode,
|
|
uint8_t disp,
|
|
uint32_t pixfmt)
|
|
{
|
|
gmode = mode;
|
|
gdisp = disp;
|
|
gpixfmt = pixfmt;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if CONFIG_IS_ENABLED(DM_VIDEO)
|
|
enum {
|
|
/* Maximum display size we support */
|
|
LCD_MAX_WIDTH = 1920,
|
|
LCD_MAX_HEIGHT = 1080,
|
|
LCD_MAX_LOG2_BPP = VIDEO_BPP16,
|
|
};
|
|
|
|
static int ipuv3_video_probe(struct udevice *dev)
|
|
{
|
|
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
|
|
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
|
|
u32 fb_start, fb_end;
|
|
int ret;
|
|
|
|
debug("%s() plat: base 0x%lx, size 0x%x\n",
|
|
__func__, plat->base, plat->size);
|
|
|
|
ret = ipu_probe();
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ipu_displays_init();
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = mxcfb_probe(gpixfmt, gdisp, gmode);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
uc_priv->xsize = gmode->xres;
|
|
uc_priv->ysize = gmode->yres;
|
|
uc_priv->bpix = LCD_MAX_LOG2_BPP;
|
|
|
|
/* Enable dcache for the frame buffer */
|
|
fb_start = plat->base & ~(MMU_SECTION_SIZE - 1);
|
|
fb_end = plat->base + plat->size;
|
|
fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
|
|
mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start,
|
|
DCACHE_WRITEBACK);
|
|
video_set_flush_dcache(dev, true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct ipuv3_video_priv {
|
|
ulong regs;
|
|
};
|
|
|
|
static int ipuv3_video_bind(struct udevice *dev)
|
|
{
|
|
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
|
|
|
|
plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
|
|
(1 << LCD_MAX_LOG2_BPP) / 8;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct udevice_id ipuv3_video_ids[] = {
|
|
{ .compatible = "fsl,imx6q-ipu" },
|
|
{ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(ipuv3_video) = {
|
|
.name = "ipuv3_video",
|
|
.id = UCLASS_VIDEO,
|
|
.of_match = ipuv3_video_ids,
|
|
.bind = ipuv3_video_bind,
|
|
.probe = ipuv3_video_probe,
|
|
.priv_auto_alloc_size = sizeof(struct ipuv3_video_priv),
|
|
.flags = DM_FLAG_PRE_RELOC,
|
|
};
|
|
#endif /* CONFIG_DM_VIDEO */
|