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When a high speed card is connected to mx25 the following error is seen: U-Boot 2017.11-rc2-00104-gb79372a (Oct 31 2017 - 11:02:22 -0200) CPU: Freescale i.MX25 rev1.2 at 399 MHz Reset cause: POR Board: MX25PDK I2C: ready DRAM: 64 MiB No arch specific invalidate_icache_all available! MMC: FSL_SDHC: 0 *** Warning - read failed, using default environment In: serial Out: serial Err: serial Net: FEC Hit any key to stop autoboot: 0 => saveenv Saving Environment to MMC... Writing to MMC(0)... failed , which prevents any usage of the SD card. The root cause for the failure is the eSDHC-A001 erratum: "eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 0x4,0x8, and 0xC" that is listed on some PowerArchitecture chips: https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf Even though eSDHC-A001 is not documented on the i.MX25 errata document, I have confirmed with the NXP design team that this erratum does affect i.MX25, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001 at SoC level. Successfully tested with a high speed SD card on a mx25pdk board. Suggested-by: Benoît Thébaudeau <benoit@wsystem.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Otavio Salvador <otavio@ossystems.com.br> # mx25pdk |
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.. | ||
mx2 | ||
mx5 | ||
mx6 | ||
mx7 | ||
mx7ulp | ||
cache.c | ||
cmd_bmode.c | ||
cmd_dek.c | ||
cmd_hdmidet.c | ||
cpu.c | ||
ddrmc-vf610.c | ||
hab.c | ||
i2c-mxv7.c | ||
imx_bootaux.c | ||
init.c | ||
iomux-v3.c | ||
Kconfig | ||
Makefile | ||
misc.c | ||
rdc-sema.c | ||
sata.c | ||
speed.c | ||
spl.c | ||
spl_sd.cfg | ||
syscounter.c | ||
timer.c | ||
video.c |