mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
e6676a34c4
This converts the following to Kconfig: CONFIG_MXC_UART Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peng Fan <peng.fan@nxp.com>
209 lines
5.6 KiB
C
209 lines
5.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
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*
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* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
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*
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* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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*
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* Configuration for the MX35pdk Freescale board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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/* High Level Configuration Options */
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#define CONFIG_MX35
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#define CONFIG_SYS_FSL_CLK
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/* Set TEXT at the beginning of the NOR flash */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
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/*
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* Hardware drivers
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/*
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* PMIC Configs
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*/
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_FSL
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#define CONFIG_POWER_FSL_MC13892
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
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#define CONFIG_RTC_MC13XXX
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/*
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* MFD MC9SDZ60
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*/
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#define CONFIG_FSL_MC9SDZ60
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#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
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/*
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* UART (console)
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*/
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/*
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* Command definition
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*/
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#define CONFIG_NET_RETRY_COUNT 100
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#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
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/*
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* Ethernet on the debug board (SMC911)
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*/
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#define CONFIG_HAS_ETH1
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#define CONFIG_ETHPRIME
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/*
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* Ethernet on SOC (FEC)
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*/
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1F
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#define CONFIG_ARP_TIMEOUT 200UL
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/*
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* Physical Memory Map
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*/
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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#define PHYS_SDRAM_2 CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_GBL_DATA_OFFSET)
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/*
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* MTD Command for mtdparts
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*/
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/*
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
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/* Monitor at beginning of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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/* Address and size of Redundant Environment Sector */
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/*
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* CFI FLASH driver setup
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*/
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/* A non-standard buffered write algorithm */
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#define CONFIG_FLASH_SPANSION_S29WS_N
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/*
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* NAND FLASH driver setup
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*/
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#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_LARGEPAGE
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/* EHCI driver */
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_EHCI_MXC
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#define CONFIG_MXC_USB_PORT 0
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#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
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MXC_EHCI_POWER_PINS_ENABLED | \
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MXC_EHCI_OC_PIN_ACTIVE_LOW)
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#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
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/* mmc driver */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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/*
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* Default environment and default scripts
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* to update uboot and load kernel
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*/
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#define CONFIG_HOSTNAME "mx35pdk"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth1\0" \
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"ethprime=smc911x\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip_sta=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
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"addip=if test -n ${ipdyn};then run addip_dyn;" \
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"else run addip_sta;fi\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=ttymxc0,${baudrate}\0" \
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"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
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"loadaddr=80800000\0" \
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"kernel_addr_r=80800000\0" \
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"hostname=" CONFIG_HOSTNAME "\0" \
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"bootfile=" CONFIG_HOSTNAME "/uImage\0" \
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"ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
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"flash_self=run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr}\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r}\0" \
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"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
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"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
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"u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
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"update=protect off ${uboot_addr} +80000;" \
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"erase ${uboot_addr} +80000;" \
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"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
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"upd=if run load;then echo Updating u-boot;if run update;" \
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"then echo U-Boot updated;" \
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"else echo Error updating u-boot !;" \
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"echo Board without bootloader !!;" \
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"fi;" \
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"else echo U-Boot not downloaded..exiting;fi\0" \
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"bootcmd=run net_nfs\0"
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#endif /* __CONFIG_H */
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