mirror of
https://github.com/AsahiLinux/u-boot
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5cd4a355e0
Add the DeveloperBox 96boards EE support. This board is also known as Socionext SynQuacer E-Series. It contians one "SC2A11" SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots, 3 PCIe slots (1 4x port and 2 1x ports which are expanded via PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard MicroATX Form Factor. For more information, see this page; https://www.96boards.org/product/developerbox/ Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016-2017 Socionext Inc.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* Timers for fasp(TIMCLK) */
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#define CONFIG_SYS_HZ 1000 /* 1 msec */
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#define CONFIG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */
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/*
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* SDRAM (for initialize)
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*/
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#define CONFIG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */
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#define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */
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#define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */
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#define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE
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#define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */
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/*
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* Boot info
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*/
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#define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */
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#define CONFIG_SYS_MALLOC_LEN (0x01000000) /* 16Mbyte size of malloc() */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default kernel load address */
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/*
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* Hardware drivers support
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*/
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/* RTC */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x51
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/* Serial (pl011) */
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#define UART_CLK (62500000)
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#define CONFIG_SERIAL_MULTI
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK UART_CLK
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#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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/* Support MTD */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BASE (0x08000000)
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#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (512 * 1024))
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE)
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600 }
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_MAXARGS 128
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
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/* #define CONFIG_SYS_PCI_64BIT 1 */
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/* Distro boot settings */
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#ifndef CONFIG_SPL_BUILD
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#ifdef CONFIG_CMD_USB
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#define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0)
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#else
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#define BOOT_TARGET_DEVICE_USB(func)
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#endif
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#ifdef CONFIG_CMD_MMC
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#define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0)
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#else
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#define BOOT_TARGET_DEVICE_MMC(func)
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#endif
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#ifdef CONFIG_CMD_NVME
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#define BOOT_TARGET_DEVICE_NVME(func) func(NVME, nvme, 0)
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#else
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#define BOOT_TARGET_DEVICE_NVME(func)
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#endif
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#ifdef CONFIG_CMD_SCSI
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#define BOOT_TARGET_DEVICE_SCSI(func) func(SCSI, scsi, 0) func(SCSI, scsi, 1)
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#else
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#define BOOT_TARGET_DEVICE_SCSI(func)
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#endif
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#define BOOT_TARGET_DEVICES(func) \
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BOOT_TARGET_DEVICE_USB(func) \
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BOOT_TARGET_DEVICE_MMC(func) \
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BOOT_TARGET_DEVICE_SCSI(func) \
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BOOT_TARGET_DEVICE_NVME(func) \
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#include <config_distro_bootcmd.h>
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#else /* CONFIG_SPL_BUILD */
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#define BOOTENV
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_addr_r=0x9fe00000\0" \
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"kernel_addr_r=0x90000000\0" \
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"ramdisk_addr_r=0xa0000000\0" \
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"scriptaddr=0x88000000\0" \
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"pxefile_addr_r=0x88100000\0" \
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BOOTENV
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#endif /* __CONFIG_H */
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