mirror of
https://github.com/AsahiLinux/u-boot
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028ab6b598
Add support for the Xilinx ML300 platform * Patch by Stephan Linz, 17 Feb 2004: Fix watchdog support for NIOS * Patch by Josh Fryman, 16 Feb 2004: Fix byte-swapping for cfi_flash.c for different bus widths * Patch by Jon Diekema, 14 Jeb 2004: Remove duplicate "FPGA Support" notes from the README file
81 lines
2.7 KiB
C
81 lines
2.7 KiB
C
/*
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* xio.h
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*
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* Defines XIo functions for Xilinx OCP in terms of Linux primitives
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*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* Copyright 2002 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef XIO_H
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#define XIO_H
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#include "xbasic_types.h"
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#include <asm/io.h>
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typedef u32 XIo_Address;
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extern inline u8
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XIo_In8(XIo_Address InAddress)
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{
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return (u8) in_8((volatile unsigned char *) InAddress);
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}
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extern inline u16
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XIo_In16(XIo_Address InAddress)
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{
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return (u16) in_be16((volatile unsigned short *) InAddress);
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}
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extern inline u32
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XIo_In32(XIo_Address InAddress)
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{
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return (u32) in_be32((volatile unsigned *) InAddress);
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}
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extern inline void
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XIo_Out8(XIo_Address OutAddress, u8 Value)
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{
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out_8((volatile unsigned char *) OutAddress, Value);
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}
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extern inline void
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XIo_Out16(XIo_Address OutAddress, u16 Value)
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{
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out_be16((volatile unsigned short *) OutAddress, Value);
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}
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extern inline void
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XIo_Out32(XIo_Address OutAddress, u32 Value)
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{
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out_be32((volatile unsigned *) OutAddress, Value);
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}
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#define XIo_ToLittleEndian16(s,d) (*(u16*)(d) = cpu_to_le16((u16)(s)))
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#define XIo_ToLittleEndian32(s,d) (*(u32*)(d) = cpu_to_le32((u32)(s)))
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#define XIo_ToBigEndian16(s,d) (*(u16*)(d) = cpu_to_be16((u16)(s)))
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#define XIo_ToBigEndian32(s,d) (*(u32*)(d) = cpu_to_be32((u32)(s)))
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#define XIo_FromLittleEndian16(s,d) (*(u16*)(d) = le16_to_cpu((u16)(s)))
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#define XIo_FromLittleEndian32(s,d) (*(u32*)(d) = le32_to_cpu((u32)(s)))
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#define XIo_FromBigEndian16(s,d) (*(u16*)(d) = be16_to_cpu((u16)(s)))
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#define XIo_FromBigEndian32(s,d) (*(u32*)(d) = be32_to_cpu((u32)(s)))
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#endif /* XIO_H */
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