mirror of
https://github.com/AsahiLinux/u-boot
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170 lines
4 KiB
C
170 lines
4 KiB
C
/*
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* (C) Copyright 2009 Faraday Technology
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* Po-Yu Chuang <ratbert@faraday-tech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <faraday/ftpmu010.h>
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#include <faraday/fttmr010.h>
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static ulong timestamp;
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static ulong lastdec;
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static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
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#define TIMER_CLOCK 32768
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#define TIMER_LOAD_VAL 0xffffffff
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int timer_init(void)
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{
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unsigned int cr;
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debug("%s()\n", __func__);
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/* disable timers */
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writel(0, &tmr->cr);
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/* use 32768Hz oscillator for RTC, WDT, TIMER */
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ftpmu010_32768osc_enable();
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/* setup timer */
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writel(TIMER_LOAD_VAL, &tmr->timer3_load);
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writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
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writel(0, &tmr->timer3_match1);
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writel(0, &tmr->timer3_match2);
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/* we don't want timer to issue interrupts */
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writel(FTTMR010_TM3_MATCH1 |
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FTTMR010_TM3_MATCH2 |
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FTTMR010_TM3_OVERFLOW,
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&tmr->interrupt_mask);
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cr = readl(&tmr->cr);
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cr |= FTTMR010_TM3_CLOCK; /* use external clock */
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cr |= FTTMR010_TM3_ENABLE;
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writel(cr, &tmr->cr);
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/* init the timestamp and lastdec value */
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reset_timer_masked();
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return 0;
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}
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/*
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* timer without interrupts
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*/
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/*
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* reset time
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*/
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void reset_timer_masked(void)
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{
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/* capure current decrementer value time */
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lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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timestamp = 0; /* start "advancing" time stamp from 0 */
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debug("%s(): lastdec = %lx\n", __func__, lastdec);
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}
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void reset_timer(void)
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{
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debug("%s()\n", __func__);
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reset_timer_masked();
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}
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/*
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* return timer ticks
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*/
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ulong get_timer_masked(void)
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{
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/* current tick value */
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ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
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if (lastdec >= now) {
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/*
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* normal mode (non roll)
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* move stamp fordward with absoulte diff ticks
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*/
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timestamp += lastdec - now;
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} else {
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/*
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* we have overflow of the count down timer
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*
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* nts = ts + ld + (TLV - now)
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* ts=old stamp, ld=time that passed before passing through -1
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* (TLV-now) amount of time after passing though -1
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* nts = new "advancing time stamp"...it could also roll and
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* cause problems.
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*/
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timestamp += lastdec + TIMER_LOAD_VAL - now;
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}
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lastdec = now;
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debug("%s() returns %lx\n", __func__, timestamp);
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return timestamp;
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}
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/*
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* return difference between timer ticks and base
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*/
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ulong get_timer(ulong base)
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{
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debug("%s(%lx)\n", __func__, base);
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return get_timer_masked() - base;
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}
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/* delay x useconds AND preserve advance timestamp value */
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void __udelay(unsigned long usec)
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{
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long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
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unsigned long now, last = readl(&tmr->timer3_counter);
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debug("%s(%lu)\n", __func__, usec);
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while (tmo > 0) {
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now = readl(&tmr->timer3_counter);
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if (now > last) /* count down timer overflow */
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tmo -= TIMER_LOAD_VAL + last - now;
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else
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tmo -= last - now;
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last = now;
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}
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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debug("%s()\n", __func__);
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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debug("%s()\n", __func__);
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return CONFIG_SYS_HZ;
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}
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