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41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
116 lines
3 KiB
C
116 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Exynos7420 pinctrl driver.
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* Copyright (C) 2016 Samsung Electronics
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* Thomas Abraham <thomas.ab@samsung.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <dm/pinctrl.h>
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#include <dm/root.h>
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#include <fdtdec.h>
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#include <asm/arch/pinmux.h>
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#include "pinctrl-exynos.h"
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#define GPD1_OFFSET 0xc0
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static struct exynos_pinctrl_config_data serial2_conf[] = {
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{
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.offset = GPD1_OFFSET + PIN_CON,
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.mask = 0x00ff0000,
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.value = 0x00220000,
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}, {
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.offset = GPD1_OFFSET + PIN_PUD,
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.mask = 0x00000f00,
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.value = 0x00000f00,
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},
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};
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static int exynos7420_pinctrl_request(struct udevice *dev, int peripheral,
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int flags)
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{
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struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
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unsigned long base = priv->base;
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switch (PERIPH_ID_UART2) {
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case PERIPH_ID_UART2:
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exynos_pinctrl_setup_peri(serial2_conf,
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ARRAY_SIZE(serial2_conf), base);
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break;
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default:
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return -ENODEV;
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}
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return 0;
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}
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static struct pinctrl_ops exynos7420_pinctrl_ops = {
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.set_state = exynos_pinctrl_set_state,
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.request = exynos7420_pinctrl_request,
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};
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/* pin banks of Exynos7420 pin-controller - BUS0 */
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static const struct samsung_pin_bank_data exynos7420_pin_banks0[] = {
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EXYNOS_PIN_BANK(5, 0x000, "gpb0"),
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EXYNOS_PIN_BANK(8, 0x020, "gpc0"),
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EXYNOS_PIN_BANK(2, 0x040, "gpc1"),
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EXYNOS_PIN_BANK(6, 0x060, "gpc2"),
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EXYNOS_PIN_BANK(8, 0x080, "gpc3"),
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EXYNOS_PIN_BANK(4, 0x0a0, "gpd0"),
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EXYNOS_PIN_BANK(6, 0x0c0, "gpd1"),
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EXYNOS_PIN_BANK(8, 0x0e0, "gpd2"),
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EXYNOS_PIN_BANK(5, 0x100, "gpd4"),
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EXYNOS_PIN_BANK(4, 0x120, "gpd5"),
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EXYNOS_PIN_BANK(6, 0x140, "gpd6"),
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EXYNOS_PIN_BANK(3, 0x160, "gpd7"),
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EXYNOS_PIN_BANK(2, 0x180, "gpd8"),
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EXYNOS_PIN_BANK(2, 0x1a0, "gpg0"),
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EXYNOS_PIN_BANK(4, 0x1c0, "gpg3"),
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};
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/* pin banks of Exynos7420 pin-controller - FSYS0 */
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static const struct samsung_pin_bank_data exynos7420_pin_banks1[] = {
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EXYNOS_PIN_BANK(7, 0x000, "gpr4"),
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};
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/* pin banks of Exynos7420 pin-controller - FSYS1 */
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static const struct samsung_pin_bank_data exynos7420_pin_banks2[] = {
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EXYNOS_PIN_BANK(4, 0x000, "gpr0"),
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EXYNOS_PIN_BANK(8, 0x020, "gpr1"),
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EXYNOS_PIN_BANK(5, 0x040, "gpr2"),
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EXYNOS_PIN_BANK(8, 0x060, "gpr3"),
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};
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const struct samsung_pin_ctrl exynos7420_pin_ctrl[] = {
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{
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/* pin-controller instance BUS0 data */
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.pin_banks = exynos7420_pin_banks0,
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.nr_banks = ARRAY_SIZE(exynos7420_pin_banks0),
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}, {
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/* pin-controller instance FSYS0 data */
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.pin_banks = exynos7420_pin_banks1,
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.nr_banks = ARRAY_SIZE(exynos7420_pin_banks1),
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}, {
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/* pin-controller instance FSYS1 data */
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.pin_banks = exynos7420_pin_banks2,
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.nr_banks = ARRAY_SIZE(exynos7420_pin_banks2),
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},
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};
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static const struct udevice_id exynos7420_pinctrl_ids[] = {
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{ .compatible = "samsung,exynos7420-pinctrl",
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.data = (ulong)exynos7420_pin_ctrl },
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{ }
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};
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U_BOOT_DRIVER(pinctrl_exynos7420) = {
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.name = "pinctrl_exynos7420",
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.id = UCLASS_PINCTRL,
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.of_match = exynos7420_pinctrl_ids,
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.priv_auto = sizeof(struct exynos_pinctrl_priv),
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.ops = &exynos7420_pinctrl_ops,
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.probe = exynos_pinctrl_probe,
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};
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