mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 17:58:23 +00:00
6d0f6bcf33
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
539 lines
13 KiB
C
539 lines
13 KiB
C
/*
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*
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* Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
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* Curt Brune <curt@cucy.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/hardware.h>
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#include <flash.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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typedef enum {
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FLASH_DEV_U9_512KB = 0,
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FLASH_DEV_U7_2MB = 1
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} FLASH_DEV;
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#define FLASH_DQ7 (0x80)
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#define FLASH_DQ5 (0x20)
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#define PROG_ADDR (0xAAA)
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#define SETUP_ADDR (0xAAA)
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#define ID_ADDR (0xAAA)
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#define UNLOCK_ADDR1 (0xAAA)
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#define UNLOCK_ADDR2 (0x555)
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#define UNLOCK_CMD1 (0xAA)
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#define UNLOCK_CMD2 (0x55)
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#define ERASE_SUSPEND_CMD (0xB0)
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#define ERASE_RESUME_CMD (0x30)
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#define RESET_CMD (0xF0)
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#define ID_CMD (0x90)
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#define SELECT_CMD (0x90)
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#define CHIPERASE_CMD (0x10)
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#define BYPASS_CMD (0x20)
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#define SECERASE_CMD (0x30)
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#define PROG_CMD (0xa0)
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#define SETUP_CMD (0x80)
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#if 0
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#define WRITE_UNLOCK(addr) { \
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PUT__U8( addr + UNLOCK_ADDR1, UNLOCK_CMD1); \
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PUT__U8( addr + UNLOCK_ADDR2, UNLOCK_CMD2); \
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}
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/* auto select command */
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#define CMD_ID(addr) WRITE_UNLOCK(addr); { \
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PUT__U8( addr + ID_ADDR, ID_CMD); \
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}
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#define CMD_RESET(addr) WRITE_UNLOCK(addr); { \
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PUT__U8( addr + ID_ADDR, RESET_CMD); \
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}
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#define CMD_ERASE_SEC(base, addr) WRITE_UNLOCK(base); \
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PUT__U8( base + SETUP_ADDR, SETUP_CMD); \
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WRITE_UNLOCK(base); \
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PUT__U8( addr, SECERASE_CMD);
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#define CMD_ERASE_CHIP(base) WRITE_UNLOCK(base); \
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PUT__U8( base + SETUP_ADDR, SETUP_CMD); \
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WRITE_UNLOCK(base); \
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PUT__U8( base + SETUP_ADDR, CHIPERASE_CMD);
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/* prepare for bypass programming */
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#define CMD_UNLOCK_BYPASS(addr) WRITE_UNLOCK(addr); { \
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PUT__U8( addr + ID_ADDR, 0x20); \
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}
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/* terminate bypass programming */
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#define CMD_BYPASS_RESET(addr) { \
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PUT__U8(addr, 0x90); \
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PUT__U8(addr, 0x00); \
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}
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#endif
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inline static void FLASH_CMD_UNLOCK (FLASH_DEV dev, u32 base)
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{
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switch (dev) {
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case FLASH_DEV_U7_2MB:
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PUT__U8 (base + 0xAAA, 0xAA);
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PUT__U8 (base + 0x555, 0x55);
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break;
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case FLASH_DEV_U9_512KB:
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PUT__U8 (base + 0x555, 0xAA);
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PUT__U8 (base + 0x2AA, 0x55);
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break;
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}
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}
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inline static void FLASH_CMD_SELECT (FLASH_DEV dev, u32 base)
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{
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switch (dev) {
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case FLASH_DEV_U7_2MB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0xAAA, SELECT_CMD);
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break;
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case FLASH_DEV_U9_512KB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0x555, SELECT_CMD);
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break;
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}
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}
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inline static void FLASH_CMD_RESET (FLASH_DEV dev, u32 base)
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{
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switch (dev) {
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case FLASH_DEV_U7_2MB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0xAAA, RESET_CMD);
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break;
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case FLASH_DEV_U9_512KB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0x555, RESET_CMD);
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break;
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}
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}
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inline static void FLASH_CMD_ERASE_SEC (FLASH_DEV dev, u32 base, u32 addr)
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{
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switch (dev) {
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case FLASH_DEV_U7_2MB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0xAAA, SETUP_CMD);
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (addr, SECERASE_CMD);
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break;
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case FLASH_DEV_U9_512KB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0x555, SETUP_CMD);
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (addr, SECERASE_CMD);
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break;
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}
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}
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inline static void FLASH_CMD_ERASE_CHIP (FLASH_DEV dev, u32 base)
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{
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switch (dev) {
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case FLASH_DEV_U7_2MB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0xAAA, SETUP_CMD);
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base, CHIPERASE_CMD);
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break;
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case FLASH_DEV_U9_512KB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0x555, SETUP_CMD);
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base, CHIPERASE_CMD);
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break;
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}
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}
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inline static void FLASH_CMD_UNLOCK_BYPASS (FLASH_DEV dev, u32 base)
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{
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switch (dev) {
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case FLASH_DEV_U7_2MB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0xAAA, BYPASS_CMD);
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break;
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case FLASH_DEV_U9_512KB:
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FLASH_CMD_UNLOCK (dev, base);
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PUT__U8 (base + 0x555, BYPASS_CMD);
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break;
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}
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}
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inline static void FLASH_CMD_BYPASS_RESET (FLASH_DEV dev, u32 base)
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{
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PUT__U8 (base, SELECT_CMD);
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PUT__U8 (base, 0x0);
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}
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/* poll for flash command completion */
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static u16 _flash_poll (FLASH_DEV dev, u32 addr, u16 data, ulong timeOut)
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{
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u32 done = 0;
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ulong t0;
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u16 error = 0;
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volatile u16 flashData;
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data = data & 0xFF;
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t0 = get_timer (0);
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while (get_timer (t0) < timeOut) {
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/* for( i = 0; i < POLL_LOOPS; i++) { */
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/* Read the Data */
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flashData = GET__U8 (addr);
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/* FLASH_DQ7 = Data? */
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if ((flashData & FLASH_DQ7) == (data & FLASH_DQ7)) {
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done = 1;
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break;
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}
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/* Check Timeout (FLASH_DQ5==1) */
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if (flashData & FLASH_DQ5) {
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/* Read the Data */
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flashData = GET__U8 (addr);
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/* FLASH_DQ7 = Data? */
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if (!((flashData & FLASH_DQ7) == (data & FLASH_DQ7))) {
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printf ("_flash_poll(): FLASH_DQ7 & flashData not equal to write value\n");
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error = ERR_PROG_ERROR;
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}
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FLASH_CMD_RESET (dev, addr);
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done = 1;
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break;
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}
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/* spin delay */
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udelay (10);
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}
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/* error update */
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if (!done) {
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printf ("_flash_poll(): Timeout\n");
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error = ERR_TIMOUT;
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}
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/* Check the data */
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if (!error) {
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/* Read the Data */
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flashData = GET__U8 (addr);
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if (flashData != data) {
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error = ERR_PROG_ERROR;
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printf ("_flash_poll(): flashData(0x%04x) not equal to data(0x%04x)\n",
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flashData, data);
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}
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}
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return error;
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}
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/*-----------------------------------------------------------------------
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*/
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static int _flash_check_protection (flash_info_t * info, int s_first, int s_last)
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{
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int sect, prot = 0;
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for (sect = s_first; sect <= s_last; sect++)
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if (info->protect[sect]) {
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printf (" Flash sector %d protected.\n", sect);
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prot++;
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}
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return prot;
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}
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static int _detectFlash (FLASH_DEV dev, u32 base, u8 venId, u8 devId)
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{
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u32 baseAddr = base | CACHE_DISABLE_MASK;
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u8 vendorId, deviceId;
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/* printf(__FUNCTION__"(): detecting flash @ 0x%08x\n", base); */
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/* Send auto select command and read manufacturer info */
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FLASH_CMD_SELECT (dev, baseAddr);
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vendorId = GET__U8 (baseAddr);
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FLASH_CMD_RESET (dev, baseAddr);
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/* Send auto select command and read device info */
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FLASH_CMD_SELECT (dev, baseAddr);
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if (dev == FLASH_DEV_U7_2MB) {
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deviceId = GET__U8 (baseAddr + 2);
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} else if (dev == FLASH_DEV_U9_512KB) {
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deviceId = GET__U8 (baseAddr + 1);
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} else {
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return 0;
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}
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FLASH_CMD_RESET (dev, baseAddr);
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/* printf (__FUNCTION__"(): found vendorId 0x%04x, deviceId 0x%04x\n",
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vendorId, deviceId);
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*/
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return (vendorId == venId) && (deviceId == devId);
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}
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/******************************************************************************
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*
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* Public u-boot interface functions below
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*
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*****************************************************************************/
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/***************************************************************************
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*
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* Flash initialization
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*
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* This board has two banks of flash, but the base addresses depend on
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* how the board is jumpered.
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*
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* The two flash types are:
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*
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* AMD Am29LV160DB (2MB) sectors layout 16KB, 2x8KB, 32KB, 31x64KB
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*
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* AMD Am29LV040B (512KB) sectors: 8x64KB
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*****************************************************************************/
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unsigned long flash_init (void)
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{
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flash_info_t *info;
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u16 i;
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u32 flashtest;
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s16 amd160 = -1;
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u32 amd160base = 0;
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#if CONFIG_SYS_MAX_FLASH_BANKS == 2
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s16 amd040 = -1;
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u32 amd040base = 0;
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#endif
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/* configure PHYS_FLASH_1 */
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if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_1, 0x1, 0x49)) {
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amd160 = 0;
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amd160base = PHYS_FLASH_1;
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#if CONFIG_SYS_MAX_FLASH_BANKS == 1
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}
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#else
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if (_detectFlash
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(FLASH_DEV_U9_512KB, PHYS_FLASH_2, 0x1, 0x4F)) {
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amd040 = 1;
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amd040base = PHYS_FLASH_2;
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} else {
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printf (__FUNCTION__
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"(): Unable to detect PHYS_FLASH_2: 0x%08x\n",
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PHYS_FLASH_2);
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}
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} else if (_detectFlash (FLASH_DEV_U9_512KB, PHYS_FLASH_1, 0x1, 0x4F)) {
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amd040 = 0;
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amd040base = PHYS_FLASH_1;
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if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_2, 0x1, 0x49)) {
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amd160 = 1;
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amd160base = PHYS_FLASH_2;
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} else {
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printf (__FUNCTION__
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"(): Unable to detect PHYS_FLASH_2: 0x%08x\n",
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PHYS_FLASH_2);
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}
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}
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#endif
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else {
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printf ("flash_init(): Unable to detect PHYS_FLASH_1: 0x%08x\n",
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PHYS_FLASH_1);
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}
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/* Configure AMD Am29LV160DB (2MB) */
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info = &flash_info[amd160];
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info->flash_id = FLASH_DEV_U7_2MB;
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info->sector_count = 35;
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info->size = 2 * 1024 * 1024; /* 2MB */
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/* 1*16K Boot Block
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2*8K Parameter Block
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1*32K Small Main Block */
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info->start[0] = amd160base;
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info->start[1] = amd160base + 0x4000;
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info->start[2] = amd160base + 0x6000;
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info->start[3] = amd160base + 0x8000;
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for (i = 1; i < info->sector_count; i++)
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info->start[3 + i] = amd160base + i * (64 * 1024);
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for (i = 0; i < info->sector_count; i++) {
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/* Write auto select command sequence and query sector protection */
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FLASH_CMD_SELECT (info->flash_id,
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info->start[i] | CACHE_DISABLE_MASK);
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flashtest =
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GET__U8 (((info->start[i] + 4) | CACHE_DISABLE_MASK));
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FLASH_CMD_RESET (info->flash_id,
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amd160base | CACHE_DISABLE_MASK);
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info->protect[i] = (flashtest & 0x0001);
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}
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/*
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* protect monitor and environment sectors in 2MB flash
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*/
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flash_protect (FLAG_PROTECT_SET,
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amd160base, amd160base + monitor_flash_len - 1, info);
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR, CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, info);
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#if CONFIG_SYS_MAX_FLASH_BANKS == 2
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/* Configure AMD Am29LV040B (512KB) */
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info = &flash_info[amd040];
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info->flash_id = FLASH_DEV_U9_512KB;
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info->sector_count = 8;
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info->size = 512 * 1024; /* 512KB, 8 x 64KB */
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = amd040base + i * (64 * 1024);
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/* Write auto select command sequence and query sector protection */
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FLASH_CMD_SELECT (info->flash_id,
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info->start[i] | CACHE_DISABLE_MASK);
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flashtest =
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GET__U8 (((info->start[i] + 2) | CACHE_DISABLE_MASK));
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FLASH_CMD_RESET (info->flash_id,
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amd040base | CACHE_DISABLE_MASK);
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info->protect[i] = (flashtest & 0x0001);
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}
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#endif
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return flash_info[0].size
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#if CONFIG_SYS_MAX_FLASH_BANKS == 2
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+ flash_info[1].size
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#endif
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;
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}
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void flash_print_info (flash_info_t * info)
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{
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int i;
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if (info->flash_id == FLASH_DEV_U7_2MB) {
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printf ("AMD Am29LV160DB (2MB) 16KB,2x8KB,32KB,31x64KB\n");
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} else if (info->flash_id == FLASH_DEV_U9_512KB) {
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printf ("AMD Am29LV040B (512KB) 8x64KB\n");
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} else {
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printf ("Unknown flash_id ...\n");
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return;
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}
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printf (" Size: %ld KB in %d Sectors\n",
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info->size >> 10, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 4) == 0)
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printf ("\n ");
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printf (" S%02d @ 0x%08lX%s", i,
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info->start[i], info->protect[i] ? " !" : " ");
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}
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printf ("\n");
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}
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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u16 i, error = 0;
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printf ("\n");
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/* check flash protection bits */
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if (_flash_check_protection (info, s_first, s_last)) {
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printf (" Flash erase aborted due to protected sectors\n");
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return ERR_PROTECTED;
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}
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if ((s_first < info->sector_count) && (s_first <= s_last)) {
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for (i = s_first; i <= s_last && !error; i++) {
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printf (" Erasing Sector %d @ 0x%08lx ... ", i,
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info->start[i]);
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/* bypass the cache to access the flash memory */
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FLASH_CMD_ERASE_SEC (info->flash_id,
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(info->
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start[0] | CACHE_DISABLE_MASK),
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(info->
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start[i] | CACHE_DISABLE_MASK));
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/* look for sector to become 0xFF after erase */
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error = _flash_poll (info->flash_id,
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info->
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start[i] | CACHE_DISABLE_MASK,
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0xFF, CONFIG_SYS_FLASH_ERASE_TOUT);
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FLASH_CMD_RESET (info->flash_id,
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(info->
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start[0] | CACHE_DISABLE_MASK));
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printf ("done\n");
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if (error) {
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break;
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}
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}
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} else
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error = ERR_INVAL;
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return error;
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}
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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u16 error = 0, i;
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|
u32 n;
|
|
u8 *bp, *bps;
|
|
|
|
/* Write Setup */
|
|
/* bypass the cache to access the flash memory */
|
|
FLASH_CMD_UNLOCK_BYPASS (info->flash_id,
|
|
(info->start[0] | CACHE_DISABLE_MASK));
|
|
|
|
/* Write the Data to Flash */
|
|
|
|
bp = (u8 *) (addr | CACHE_DISABLE_MASK);
|
|
bps = (u8 *) src;
|
|
|
|
for (n = 0; n < cnt && !error; n++, bp++, bps++) {
|
|
|
|
if (!(n % (cnt / 15))) {
|
|
printf (".");
|
|
}
|
|
|
|
/* write the flash command for flash memory */
|
|
*bp = 0xA0;
|
|
|
|
/* Write the data */
|
|
*bp = *bps;
|
|
|
|
/* Check if the write is done */
|
|
for (i = 0; i < 0xff; i++);
|
|
error = _flash_poll (info->flash_id, (u32) bp, *bps,
|
|
CONFIG_SYS_FLASH_WRITE_TOUT);
|
|
if (error) {
|
|
return error;
|
|
}
|
|
}
|
|
|
|
/* Reset the Flash Mode to read */
|
|
FLASH_CMD_BYPASS_RESET (info->flash_id, info->start[0]);
|
|
|
|
printf (" ");
|
|
|
|
return error;
|
|
}
|