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In addition to the regular mux configuration, certain pins of DRA7 require to have "manual mode" also programmed, when predefined delay characteristics cannot be used for the interface. struct iodelay_cfg_entry is introduced for populating manual mode IO timings. For configuring manual mode, along with the normal pad configuration do the following steps: - Select MODESELECT field of each assocaited PAD. CTRL_CORE_PAD_XXX[8]:MODESELECT = 1(Enable MANUAL_MODE macro along with mux) - Populate A_DELAY, G_DELAY values that are specified in DATA MANUAL. And pass the offset of the CFG_XXX register in iodelay_cfg_entry. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
368 lines
8.9 KiB
C
368 lines
8.9 KiB
C
/*
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* (C) Copyright 2013
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* Texas Instruments Incorporated
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*
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* Nishant Kamat <nskamat@ti.com>
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* Lokesh Vutla <lokeshvutla@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _MUX_DRA7XX_H_
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#define _MUX_DRA7XX_H_
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#include <asm/types.h>
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#define FSC (1 << 19)
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#define SSC (0 << 19)
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#define IEN (1 << 18)
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#define IDIS (0 << 18)
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#define PTU (1 << 17)
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#define PTD (0 << 17)
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#define PEN (1 << 16)
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#define PDIS (0 << 16)
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#define WKEN (1 << 24)
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#define WKDIS (0 << 24)
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#define PULL_ENA (0 << 16)
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#define PULL_DIS (1 << 16)
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#define PULL_UP (1 << 17)
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#define INPUT_EN (1 << 18)
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#define SLEWCONTROL (1 << 19)
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/* Active pin states */
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#define PIN_OUTPUT (0 | PULL_DIS)
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#define PIN_OUTPUT_PULLUP (PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (0)
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#define PIN_INPUT (INPUT_EN | PULL_DIS)
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#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
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#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
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#define M0 0
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#define M1 1
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#define M2 2
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#define M3 3
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#define M4 4
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#define M5 5
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#define M6 6
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#define M7 7
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#define M8 8
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#define M9 9
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#define M10 10
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#define M11 11
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#define M12 12
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#define M13 13
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#define M14 14
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#define M15 15
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#define MODE_SELECT (1 << 8)
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#define DELAYMODE_SHIFT 4
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#define MANUAL_MODE MODE_SELECT
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#define VIRTUAL_MODE0 (MODE_SELECT | (0x0 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE1 (MODE_SELECT | (0x1 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE2 (MODE_SELECT | (0x2 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE3 (MODE_SELECT | (0x3 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE4 (MODE_SELECT | (0x4 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE5 (MODE_SELECT | (0x5 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE6 (MODE_SELECT | (0x6 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE7 (MODE_SELECT | (0x7 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE8 (MODE_SELECT | (0x8 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE9 (MODE_SELECT | (0x9 << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE10 (MODE_SELECT | (0xa << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE11 (MODE_SELECT | (0xb << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE12 (MODE_SELECT | (0xc << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE13 (MODE_SELECT | (0xd << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE14 (MODE_SELECT | (0xe << DELAYMODE_SHIFT))
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#define VIRTUAL_MODE15 (MODE_SELECT | (0xf << DELAYMODE_SHIFT))
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#define SAFE_MODE M15
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#define GPMC_AD0 0x000
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#define GPMC_AD1 0x004
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#define GPMC_AD2 0x008
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#define GPMC_AD3 0x00C
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#define GPMC_AD4 0x010
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#define GPMC_AD5 0x014
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#define GPMC_AD6 0x018
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#define GPMC_AD7 0x01C
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#define GPMC_AD8 0x020
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#define GPMC_AD9 0x024
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#define GPMC_AD10 0x028
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#define GPMC_AD11 0x02C
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#define GPMC_AD12 0x030
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#define GPMC_AD13 0x034
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#define GPMC_AD14 0x038
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#define GPMC_AD15 0x03C
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#define GPMC_A0 0x040
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#define GPMC_A1 0x044
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#define GPMC_A2 0x048
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#define GPMC_A3 0x04C
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#define GPMC_A4 0x050
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#define GPMC_A5 0x054
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#define GPMC_A6 0x058
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#define GPMC_A7 0x05C
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#define GPMC_A8 0x060
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#define GPMC_A9 0x064
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#define GPMC_A10 0x068
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#define GPMC_A11 0x06C
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#define GPMC_A12 0x070
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#define GPMC_A13 0x074
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#define GPMC_A14 0x078
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#define GPMC_A15 0x07C
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#define GPMC_A16 0x080
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#define GPMC_A17 0x084
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#define GPMC_A18 0x088
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#define GPMC_A19 0x08C
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#define GPMC_A20 0x090
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#define GPMC_A21 0x094
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#define GPMC_A22 0x098
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#define GPMC_A23 0x09C
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#define GPMC_A24 0x0A0
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#define GPMC_A25 0x0A4
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#define GPMC_A26 0x0A8
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#define GPMC_A27 0x0AC
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#define GPMC_CS1 0x0B0
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#define GPMC_CS0 0x0B4
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#define GPMC_CS2 0x0B8
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#define GPMC_CS3 0x0BC
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#define GPMC_CLK 0x0C0
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#define GPMC_ADVN_ALE 0x0C4
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#define GPMC_OEN_REN 0x0C8
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#define GPMC_WEN 0x0CC
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#define GPMC_BEN0 0x0D0
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#define GPMC_BEN1 0x0D4
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#define GPMC_WAIT0 0x0D8
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#define VIN1A_CLK0 0x0DC
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#define VIN1B_CLK1 0x0E0
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#define VIN1A_DE0 0x0E4
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#define VIN1A_FLD0 0x0E8
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#define VIN1A_HSYNC0 0x0EC
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#define VIN1A_VSYNC0 0x0F0
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#define VIN1A_D0 0x0F4
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#define VIN1A_D1 0x0F8
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#define VIN1A_D2 0x0FC
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#define VIN1A_D3 0x100
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#define VIN1A_D4 0x104
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#define VIN1A_D5 0x108
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#define VIN1A_D6 0x10C
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#define VIN1A_D7 0x110
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#define VIN1A_D8 0x114
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#define VIN1A_D9 0x118
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#define VIN1A_D10 0x11C
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#define VIN1A_D11 0x120
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#define VIN1A_D12 0x124
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#define VIN1A_D13 0x128
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#define VIN1A_D14 0x12C
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#define VIN1A_D15 0x130
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#define VIN1A_D16 0x134
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#define VIN1A_D17 0x138
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#define VIN1A_D18 0x13C
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#define VIN1A_D19 0x140
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#define VIN1A_D20 0x144
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#define VIN1A_D21 0x148
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#define VIN1A_D22 0x14C
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#define VIN1A_D23 0x150
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#define VIN2A_CLK0 0x154
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#define VIN2A_DE0 0x158
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#define VIN2A_FLD0 0x15C
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#define VIN2A_HSYNC0 0x160
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#define VIN2A_VSYNC0 0x164
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#define VIN2A_D0 0x168
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#define VIN2A_D1 0x16C
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#define VIN2A_D2 0x170
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#define VIN2A_D3 0x174
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#define VIN2A_D4 0x178
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#define VIN2A_D5 0x17C
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#define VIN2A_D6 0x180
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#define VIN2A_D7 0x184
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#define VIN2A_D8 0x188
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#define VIN2A_D9 0x18C
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#define VIN2A_D10 0x190
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#define VIN2A_D11 0x194
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#define VIN2A_D12 0x198
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#define VIN2A_D13 0x19C
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#define VIN2A_D14 0x1A0
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#define VIN2A_D15 0x1A4
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#define VIN2A_D16 0x1A8
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#define VIN2A_D17 0x1AC
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#define VIN2A_D18 0x1B0
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#define VIN2A_D19 0x1B4
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#define VIN2A_D20 0x1B8
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#define VIN2A_D21 0x1BC
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#define VIN2A_D22 0x1C0
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#define VIN2A_D23 0x1C4
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#define VOUT1_CLK 0x1C8
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#define VOUT1_DE 0x1CC
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#define VOUT1_FLD 0x1D0
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#define VOUT1_HSYNC 0x1D4
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#define VOUT1_VSYNC 0x1D8
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#define VOUT1_D0 0x1DC
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#define VOUT1_D1 0x1E0
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#define VOUT1_D2 0x1E4
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#define VOUT1_D3 0x1E8
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#define VOUT1_D4 0x1EC
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#define VOUT1_D5 0x1F0
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#define VOUT1_D6 0x1F4
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#define VOUT1_D7 0x1F8
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#define VOUT1_D8 0x1FC
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#define VOUT1_D9 0x200
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#define VOUT1_D10 0x204
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#define VOUT1_D11 0x208
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#define VOUT1_D12 0x20C
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#define VOUT1_D13 0x210
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#define VOUT1_D14 0x214
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#define VOUT1_D15 0x218
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#define VOUT1_D16 0x21C
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#define VOUT1_D17 0x220
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#define VOUT1_D18 0x224
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#define VOUT1_D19 0x228
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#define VOUT1_D20 0x22C
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#define VOUT1_D21 0x230
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#define VOUT1_D22 0x234
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#define VOUT1_D23 0x238
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#define MDIO_MCLK 0x23C
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#define MDIO_D 0x240
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#define RMII_MHZ_50_CLK 0x244
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#define UART3_RXD 0x248
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#define UART3_TXD 0x24C
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#define RGMII0_TXC 0x250
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#define RGMII0_TXCTL 0x254
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#define RGMII0_TXD3 0x258
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#define RGMII0_TXD2 0x25C
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#define RGMII0_TXD1 0x260
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#define RGMII0_TXD0 0x264
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#define RGMII0_RXC 0x268
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#define RGMII0_RXCTL 0x26C
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#define RGMII0_RXD3 0x270
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#define RGMII0_RXD2 0x274
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#define RGMII0_RXD1 0x278
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#define RGMII0_RXD0 0x27C
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#define USB1_DRVVBUS 0x280
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#define USB2_DRVVBUS 0x284
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#define GPIO6_14 0x288
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#define GPIO6_15 0x28C
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#define GPIO6_16 0x290
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#define XREF_CLK0 0x294
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#define XREF_CLK1 0x298
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#define XREF_CLK2 0x29C
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#define XREF_CLK3 0x2A0
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#define MCASP1_ACLKX 0x2A4
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#define MCASP1_FSX 0x2A8
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#define MCASP1_ACLKR 0x2AC
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#define MCASP1_FSR 0x2B0
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#define MCASP1_AXR0 0x2B4
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#define MCASP1_AXR1 0x2B8
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#define MCASP1_AXR2 0x2BC
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#define MCASP1_AXR3 0x2C0
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#define MCASP1_AXR4 0x2C4
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#define MCASP1_AXR5 0x2C8
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#define MCASP1_AXR6 0x2CC
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#define MCASP1_AXR7 0x2D0
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#define MCASP1_AXR8 0x2D4
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#define MCASP1_AXR9 0x2D8
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#define MCASP1_AXR10 0x2DC
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#define MCASP1_AXR11 0x2E0
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#define MCASP1_AXR12 0x2E4
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#define MCASP1_AXR13 0x2E8
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#define MCASP1_AXR14 0x2EC
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#define MCASP1_AXR15 0x2F0
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#define MCASP2_ACLKX 0x2F4
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#define MCASP2_FSX 0x2F8
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#define MCASP2_ACLKR 0x2FC
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#define MCASP2_FSR 0x300
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#define MCASP2_AXR0 0x304
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#define MCASP2_AXR1 0x308
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#define MCASP2_AXR2 0x30C
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#define MCASP2_AXR3 0x310
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#define MCASP2_AXR4 0x314
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#define MCASP2_AXR5 0x318
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#define MCASP2_AXR6 0x31C
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#define MCASP2_AXR7 0x320
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#define MCASP3_ACLKX 0x324
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#define MCASP3_FSX 0x328
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#define MCASP3_AXR0 0x32C
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#define MCASP3_AXR1 0x330
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#define MCASP4_ACLKX 0x334
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#define MCASP4_FSX 0x338
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#define MCASP4_AXR0 0x33C
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#define MCASP4_AXR1 0x340
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#define MCASP5_ACLKX 0x344
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#define MCASP5_FSX 0x348
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#define MCASP5_AXR0 0x34C
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#define MCASP5_AXR1 0x350
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#define MMC1_CLK 0x354
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#define MMC1_CMD 0x358
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#define MMC1_DAT0 0x35C
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#define MMC1_DAT1 0x360
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#define MMC1_DAT2 0x364
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#define MMC1_DAT3 0x368
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#define MMC1_SDCD 0x36C
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#define MMC1_SDWP 0x370
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#define GPIO6_10 0x374
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#define GPIO6_11 0x378
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#define MMC3_CLK 0x37C
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#define MMC3_CMD 0x380
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#define MMC3_DAT0 0x384
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#define MMC3_DAT1 0x388
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#define MMC3_DAT2 0x38C
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#define MMC3_DAT3 0x390
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#define MMC3_DAT4 0x394
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#define MMC3_DAT5 0x398
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#define MMC3_DAT6 0x39C
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#define MMC3_DAT7 0x3A0
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#define SPI1_SCLK 0x3A4
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#define SPI1_D1 0x3A8
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#define SPI1_D0 0x3AC
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#define SPI1_CS0 0x3B0
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#define SPI1_CS1 0x3B4
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#define SPI1_CS2 0x3B8
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#define SPI1_CS3 0x3BC
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#define SPI2_SCLK 0x3C0
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#define SPI2_D1 0x3C4
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#define SPI2_D0 0x3C8
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#define SPI2_CS0 0x3CC
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#define DCAN1_TX 0x3D0
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#define DCAN1_RX 0x3D4
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#define DCAN2_TX 0x3D8
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#define DCAN2_RX 0x3DC
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#define UART1_RXD 0x3E0
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#define UART1_TXD 0x3E4
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#define UART1_CTSN 0x3E8
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#define UART1_RTSN 0x3EC
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#define UART2_RXD 0x3F0
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#define UART2_TXD 0x3F4
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#define UART2_CTSN 0x3F8
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#define UART2_RTSN 0x3FC
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#define I2C1_SDA 0x400
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#define I2C1_SCL 0x404
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#define I2C2_SDA 0x408
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#define I2C2_SCL 0x40C
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#define I2C3_SDA 0x410
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#define I2C3_SCL 0x414
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#define WAKEUP0 0x418
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#define WAKEUP1 0x41C
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#define WAKEUP2 0x420
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#define WAKEUP3 0x424
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#define ON_OFF 0x428
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#define RTC_PORZ 0x42C
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#define TMS 0x430
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#define TDI 0x434
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#define TDO 0x438
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#define TCLK 0x43C
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#define TRSTN 0x440
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#define RTCK 0x444
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#define EMU0 0x448
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#define EMU1 0x44C
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#define EMU2 0x450
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#define EMU3 0x454
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#define EMU4 0x458
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#define RESETN 0x45C
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#define NMIN 0x460
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#define RSTOUTN 0x464
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#endif /* _MUX_DRA7XX_H_ */
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