mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 03:08:31 +00:00
0efc02499f
This allows us to put the SPI flash chip inside the SPI interface node, with U-Boot finding the correct bus and chip select automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
145 lines
3.6 KiB
C
145 lines
3.6 KiB
C
/*
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* Chromium OS cros_ec driver - SPI interface
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*
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* Copyright (c) 2012 The Chromium OS Authors.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* The Matrix Keyboard Protocol driver handles talking to the keyboard
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* controller chip. Mostly this is for keyboard functions, but some other
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* things have slipped in, so we provide generic services to talk to the
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* KBC.
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*/
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#include <common.h>
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#include <cros_ec.h>
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#include <spi.h>
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/**
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* Send a command to a LPC CROS_EC device and return the reply.
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*
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* The device's internal input/output buffers are used.
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*
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* @param dev CROS_EC device
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* @param cmd Command to send (EC_CMD_...)
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* @param cmd_version Version of command to send (EC_VER_...)
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* @param dout Output data (may be NULL If dout_len=0)
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* @param dout_len Size of output data in bytes
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* @param dinp Returns pointer to response data. This will be
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* untouched unless we return a value > 0.
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* @param din_len Maximum size of response in bytes
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* @return number of bytes in response, or -1 on error
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*/
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int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
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const uint8_t *dout, int dout_len,
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uint8_t **dinp, int din_len)
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{
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int in_bytes = din_len + 4; /* status, length, checksum, trailer */
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uint8_t *out;
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uint8_t *p;
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int csum, len;
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int rv;
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/*
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* Sanity-check input size to make sure it plus transaction overhead
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* fits in the internal device buffer.
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*/
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if (in_bytes > sizeof(dev->din)) {
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debug("%s: Cannot receive %d bytes\n", __func__, din_len);
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return -1;
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}
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/* We represent message length as a byte */
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if (dout_len > 0xff) {
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debug("%s: Cannot send %d bytes\n", __func__, dout_len);
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return -1;
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}
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/*
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* Clear input buffer so we don't get false hits for MSG_HEADER
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*/
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memset(dev->din, '\0', in_bytes);
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if (spi_claim_bus(dev->spi)) {
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debug("%s: Cannot claim SPI bus\n", __func__);
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return -1;
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}
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out = dev->dout;
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out[0] = cmd_version;
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out[1] = cmd;
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out[2] = (uint8_t)dout_len;
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memcpy(out + 3, dout, dout_len);
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csum = cros_ec_calc_checksum(out, 3)
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+ cros_ec_calc_checksum(dout, dout_len);
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out[3 + dout_len] = (uint8_t)csum;
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/*
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* Send output data and receive input data starting such that the
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* message body will be dword aligned.
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*/
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p = dev->din + sizeof(int64_t) - 2;
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len = dout_len + 4;
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cros_ec_dump_data("out", cmd, out, len);
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rv = spi_xfer(dev->spi, max(len, in_bytes) * 8, out, p,
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SPI_XFER_BEGIN | SPI_XFER_END);
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spi_release_bus(dev->spi);
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if (rv) {
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debug("%s: Cannot complete SPI transfer\n", __func__);
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return -1;
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}
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len = min(p[1], din_len);
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cros_ec_dump_data("in", -1, p, len + 3);
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/* Response code is first byte of message */
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if (p[0] != EC_RES_SUCCESS) {
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printf("%s: Returned status %d\n", __func__, p[0]);
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return -(int)(p[0]);
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}
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/* Check checksum */
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csum = cros_ec_calc_checksum(p, len + 2);
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if (csum != p[len + 2]) {
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debug("%s: Invalid checksum rx %#02x, calced %#02x\n", __func__,
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p[2 + len], csum);
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return -1;
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}
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/* Anything else is the response data */
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*dinp = p + 2;
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return len;
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}
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int cros_ec_spi_decode_fdt(struct cros_ec_dev *dev, const void *blob)
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{
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/* Decode interface-specific FDT params */
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dev->max_frequency = fdtdec_get_int(blob, dev->node,
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"spi-max-frequency", 500000);
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dev->cs = fdtdec_get_int(blob, dev->node, "reg", 0);
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return 0;
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}
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/**
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* Initialize SPI protocol.
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*
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* @param dev CROS_EC device
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* @param blob Device tree blob
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* @return 0 if ok, -1 on error
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*/
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int cros_ec_spi_init(struct cros_ec_dev *dev, const void *blob)
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{
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dev->spi = spi_setup_slave_fdt(blob, dev->parent_node, dev->node);
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if (!dev->spi) {
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debug("%s: Could not setup SPI slave\n", __func__);
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return -1;
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}
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return 0;
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}
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