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https://github.com/AsahiLinux/u-boot
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c26de2d8b1
There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p3041 to cpu_type_list and SVR list * Added number of LAWs for p3041 * Set CONFIG_MAX_CPUS to 4 for p3041 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
278 lines
6.5 KiB
C
278 lines
6.5 KiB
C
/*
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* Copyright 2008-2010 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* number of LAWs in the hw implementation */
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#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
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defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
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#define FSL_HW_NUM_LAWS 8
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#elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
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defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
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defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
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#define FSL_HW_NUM_LAWS 10
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#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
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defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
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defined(CONFIG_P1012) || defined(CONFIG_P1021) || \
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defined(CONFIG_P1013) || defined(CONFIG_P1022) || \
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defined(CONFIG_P2010) || defined(CONFIG_P2020)
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#define FSL_HW_NUM_LAWS 12
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#elif defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P4080) || \
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defined(CONFIG_PPC_P5020)
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#define FSL_HW_NUM_LAWS 32
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#else
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#error FSL_HW_NUM_LAWS not defined for this platform
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#endif
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#ifdef CONFIG_FSL_CORENET
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#define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
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#define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
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#define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
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#define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
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#define LAWBAR_SHIFT 0
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#else
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#define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
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#define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
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#define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
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#define LAWBAR_SHIFT 12
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#endif
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static inline phys_addr_t get_law_base_addr(int idx)
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{
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#ifdef CONFIG_FSL_CORENET
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return (phys_addr_t)
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((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
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in_be32(LAWBARL_ADDR(idx));
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#else
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return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
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#endif
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}
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static inline void set_law_base_addr(int idx, phys_addr_t addr)
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{
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#ifdef CONFIG_FSL_CORENET
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out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
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out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
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#else
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out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
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#endif
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}
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void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
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{
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gd->used_laws |= (1 << idx);
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out_be32(LAWAR_ADDR(idx), 0);
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set_law_base_addr(idx, addr);
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out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
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/* Read back so that we sync the writes */
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in_be32(LAWAR_ADDR(idx));
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}
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void disable_law(u8 idx)
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{
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gd->used_laws &= ~(1 << idx);
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out_be32(LAWAR_ADDR(idx), 0);
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set_law_base_addr(idx, 0);
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/* Read back so that we sync the writes */
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in_be32(LAWAR_ADDR(idx));
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return;
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}
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#ifndef CONFIG_NAND_SPL
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static int get_law_entry(u8 i, struct law_entry *e)
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{
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u32 lawar;
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lawar = in_be32(LAWAR_ADDR(i));
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if (!(lawar & LAW_EN))
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return 0;
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e->addr = get_law_base_addr(i);
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e->size = lawar & 0x3f;
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e->trgt_id = (lawar >> 20) & 0xff;
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return 1;
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}
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#endif
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int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
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{
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u32 idx = ffz(gd->used_laws);
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if (idx >= FSL_HW_NUM_LAWS)
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return -1;
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set_law(idx, addr, sz, id);
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return idx;
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}
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#ifndef CONFIG_NAND_SPL
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int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
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{
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u32 idx;
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/* we have no LAWs free */
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if (gd->used_laws == -1)
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return -1;
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/* grab the last free law */
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idx = __ilog2(~(gd->used_laws));
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if (idx >= FSL_HW_NUM_LAWS)
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return -1;
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set_law(idx, addr, sz, id);
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return idx;
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}
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struct law_entry find_law(phys_addr_t addr)
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{
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struct law_entry entry;
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int i;
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entry.index = -1;
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entry.addr = 0;
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entry.size = 0;
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entry.trgt_id = 0;
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for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
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u64 upper;
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if (!get_law_entry(i, &entry))
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continue;
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upper = entry.addr + (2ull << entry.size);
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if ((addr >= entry.addr) && (addr < upper)) {
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entry.index = i;
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break;
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}
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}
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return entry;
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}
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void print_laws(void)
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{
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int i;
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u32 lawar;
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printf("\nLocal Access Window Configuration\n");
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for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
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lawar = in_be32(LAWAR_ADDR(i));
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#ifdef CONFIG_FSL_CORENET
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printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
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i, in_be32(LAWBARH_ADDR(i)),
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i, in_be32(LAWBARL_ADDR(i)));
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#else
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printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
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#endif
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printf(" LAWAR0x%02d: 0x%08x\n", i, lawar);
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printf("\t(EN: %d TGT: 0x%02x SIZE: ",
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(lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
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print_size(lawar_size(lawar), ")\n");
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}
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return;
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}
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/* use up to 2 LAWs for DDR, used the last available LAWs */
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int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
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{
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u64 start_align, law_sz;
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int law_sz_enc;
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if (start == 0)
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start_align = 1ull << (LAW_SIZE_32G + 1);
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else
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start_align = 1ull << (ffs64(start) - 1);
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law_sz = min(start_align, sz);
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law_sz_enc = __ilog2_u64(law_sz) - 1;
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if (set_last_law(start, law_sz_enc, id) < 0)
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return -1;
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/* recalculate size based on what was actually covered by the law */
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law_sz = 1ull << __ilog2_u64(law_sz);
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/* do we still have anything to map */
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sz = sz - law_sz;
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if (sz) {
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start += law_sz;
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start_align = 1ull << (ffs64(start) - 1);
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law_sz = min(start_align, sz);
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law_sz_enc = __ilog2_u64(law_sz) - 1;
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if (set_last_law(start, law_sz_enc, id) < 0)
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return -1;
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} else {
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return 0;
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}
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/* do we still have anything to map */
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sz = sz - law_sz;
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if (sz)
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return 1;
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return 0;
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}
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#endif
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void init_laws(void)
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{
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int i;
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#if FSL_HW_NUM_LAWS < 32
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gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
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#elif FSL_HW_NUM_LAWS == 32
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gd->used_laws = 0;
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#else
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#error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
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#endif
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for (i = 0; i < num_law_entries; i++) {
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if (law_table[i].index == -1)
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set_next_law(law_table[i].addr, law_table[i].size,
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law_table[i].trgt_id);
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else
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set_law(law_table[i].index, law_table[i].addr,
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law_table[i].size, law_table[i].trgt_id);
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}
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return ;
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}
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