u-boot/arch/riscv/cpu
Rick Chen 5b71b7bf92 riscv: ax25: bypass malloc when spl fit boots from ram
When fit image boots from ram, the payload will
be prepared in the address of SPL_LOAD_FIT_ADDRESS.
In spl fit generic flow, it will malloc another
memory address and copy whole fit image to this
malloc address.  But it is un-necessary for booting
from RAM.

This patch improves this flow by declare the
board_spl_fit_buffer_addr() to replace the original one.
The larger image size (eq: Kernel Image 10~20MB), it
can save more booting time.

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-02-01 16:17:45 +08:00
..
ax25 riscv: ax25: bypass malloc when spl fit boots from ram 2023-02-01 16:17:45 +08:00
fu540 board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
fu740 board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
generic board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
cpu.c riscv: cpu: check U-Mode before counteren write 2023-02-01 16:17:13 +08:00
Makefile riscv: Move trap handler codes to mtrap.S 2018-12-18 09:56:27 +08:00
mtrap.S riscv: Add option to print registers on exception 2020-02-10 14:51:08 +08:00
start.S riscv: Introduce AVAILABLE_HARTS 2022-09-26 14:29:13 +08:00
u-boot-spl.lds linker_lists: Rename sections to remove . prefix 2022-06-23 12:58:18 -04:00
u-boot.lds linker_lists: Rename sections to remove . prefix 2022-06-23 12:58:18 -04:00