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1ebfc0c631
So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure monitor code (providing PSCI runtime services). And while those SoCs do not have the secure SRAM B like older SoCs, there is enough (secure) SRAM A2 to put the monitor code and data in there instead. Follow the design of 64-bit SoCs and use the first part for the monitor, and the last 16 KiB for the SCP firmware. With this change, the monitor no longer needs to reserve a region in DRAM. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> [Andre: amend commit message, fix R40 and V3s build] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
30 lines
774 B
C
30 lines
774 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2014 Chen-Yu Tsai <wens@csie.org>
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*
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* Configuration settings for the Allwinner A23 (sun8i) CPU
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* A23 specific configuration
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*/
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#ifdef SUNXI_SRAM_A2_SIZE
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/*
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* If the SoC has enough SRAM A2, use that for the secure monitor.
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* Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
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* are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
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*/
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#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
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#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
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#endif
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/*
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* Include common sunxi configuration where most the settings are
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*/
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#include <configs/sunxi-common.h>
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#endif /* __CONFIG_H */
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