mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
f7cf291aa7
The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache memory. Make sure it is configured as a L2 cache memory when booting from a SPL image. Based on the commit b5ea95ef2b5b from the at91bootstrap repository. Signed-off-by: Samuel Mescoff <samuel.mescoff@mobile-devices.fr> Reviewed-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
28 lines
643 B
C
28 lines
643 B
C
/*
|
|
* Copyright (C) 2015 Atmel Corporation
|
|
* Wenyou Yang <wenyou.yang@atmel.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/sama5_sfr.h>
|
|
|
|
void redirect_int_from_saic_to_aic(void)
|
|
{
|
|
struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
|
|
u32 key32;
|
|
|
|
if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
|
|
key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
|
|
writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
|
|
}
|
|
}
|
|
|
|
void configure_2nd_sram_as_l2_cache(void)
|
|
{
|
|
struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
|
|
|
|
writel(1, &sfr->l2cc_hramc);
|
|
}
|