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5a762e2509
Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> |
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| .. | ||
| bios_emulator | ||
| block | ||
| dma | ||
| fpga | ||
| gpio | ||
| hwmon | ||
| i2c | ||
| input | ||
| misc | ||
| mmc | ||
| mtd | ||
| net | ||
| pci | ||
| pcmcia | ||
| power | ||
| qe | ||
| rtc | ||
| serial | ||
| spi | ||
| twserial | ||
| usb | ||
| video | ||
| watchdog | ||