mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 16:39:35 +00:00
d1de41d7fa
Spring is the first ARM-based HP Chromebook 11. It is similar to snow and it uses the same Samsung Exynos5250 chip. But has some unusual features. Mainline support for it has lagged snow (both in kernel and U-Boot). Now that the exynos5 code is common we can support spring just by adding a device tree and a few lines of configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
588 lines
14 KiB
Text
588 lines
14 KiB
Text
/*
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* Google Spring board device tree source
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*
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* Copyright (c) 2013 Google, Inc
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* Copyright (c) 2014 SUSE LINUX Products GmbH
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/input/input.h>
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#include "exynos5250.dtsi"
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/ {
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model = "Google Spring";
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compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
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aliases {
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i2c0 = "/i2c@12C60000";
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i2c1 = "/i2c@12C70000";
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i2c2 = "/i2c@12C80000";
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i2c3 = "/i2c@12C90000";
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i2c4 = "/i2c@12CA0000";
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i2c5 = "/i2c@12CB0000";
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i2c6 = "/i2c@12CC0000";
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i2c7 = "/i2c@12CD0000";
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i2c104 = &cros_ec_ldo_tunnel;
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spi0 = "/spi@12d20000";
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spi1 = "/spi@12d30000";
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spi2 = "/spi@12d40000";
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spi3 = "/spi@131a0000";
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spi4 = "/spi@131b0000";
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mmc0 = "/mmc@12000000";
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serial0 = "/serial@12C30000";
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console = "/serial@12C30000";
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i2s = "/sound@3830000";
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};
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memory {
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reg = <0x40000000 0x80000000>;
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};
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flash@0 {
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spl { /* spl size override */
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size = <0x8000>;
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};
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};
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chosen {
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bootargs = "console=tty1";
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stdout-path = "serial3:115200n8";
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};
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board-rev {
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compatible = "google,board-revision";
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google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
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<&gpy4 2 0>;
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};
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mmc@12200000 {
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samsung,bus-width = <8>;
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samsung,timing = <1 3 3>;
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samsung,removable = <0>;
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};
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mmc@12210000 {
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status = "disabled";
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};
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mmc@12220000 {
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/* MMC2 pins are used as GPIO for eDP bridge */
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status = "disabled";
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};
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mmc@12230000 {
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status = "disabled";
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};
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ehci@12110000 {
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samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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xhci@12000000 {
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samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
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};
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spi@12d30000 {
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spi-max-frequency = <50000000>;
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firmware_storage_spi: flash@0 {
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compatible = "spi-flash";
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reg = <0>;
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};
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};
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tmu@10060000 {
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samsung,min-temp = <25>;
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samsung,max-temp = <125>;
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samsung,start-warning = <95>;
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samsung,start-tripping = <105>;
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samsung,hw-tripping = <110>;
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samsung,efuse-min-value = <40>;
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samsung,efuse-value = <55>;
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samsung,efuse-max-value = <100>;
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samsung,slope = <274761730>;
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samsung,dc-value = <25>;
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};
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fimd@14400000 {
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samsung,vl-freq = <60>;
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samsung,vl-col = <1366>;
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samsung,vl-row = <768>;
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samsung,vl-width = <1366>;
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samsung,vl-height = <768>;
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samsung,vl-clkp;
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samsung,vl-dp;
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samsung,vl-hsp;
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samsung,vl-vsp;
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samsung,vl-bpix = <4>;
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samsung,vl-hspw = <32>;
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samsung,vl-hbpd = <80>;
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samsung,vl-hfpd = <48>;
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samsung,vl-vspw = <5>;
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samsung,vl-vbpd = <14>;
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samsung,vl-vfpd = <3>;
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samsung,vl-cmd-allow-len = <0xf>;
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samsung,winid = <0>;
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samsung,interface-mode = <1>;
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samsung,dp-enabled = <1>;
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samsung,dual-lcd-enabled = <0>;
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};
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dp@145b0000 {
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samsung,lt-status = <0>;
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samsung,master-mode = <0>;
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samsung,bist-mode = <0>;
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samsung,bist-pattern = <0>;
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samsung,h-sync-polarity = <0>;
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samsung,v-sync-polarity = <0>;
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samsung,interlaced = <0>;
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samsung,color-space = <0>;
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samsung,dynamic-range = <0>;
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samsung,ycbcr-coeff = <0>;
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samsung,color-depth = <1>;
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};
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};
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&i2c_0 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <378000>;
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s5m8767-pmic@66 {
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compatible = "samsung,s5m8767-pmic";
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reg = <0x66>;
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interrupt-parent = <&gpx3>;
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wakeup-source;
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s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
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<&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
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<&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
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s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
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<&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
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<&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
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/*
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* The following arrays of DVS voltages are not used, since we are
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* not using GPIOs to control PMIC bucks, but they must be defined
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* to please the driver.
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*/
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s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
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<1250000>, <1200000>,
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<1150000>, <1100000>,
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<1000000>, <950000>;
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s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
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<1100000>, <1100000>,
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<1000000>, <1000000>,
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<1000000>, <1000000>;
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s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
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<1200000>, <1200000>,
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<1200000>, <1200000>,
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<1200000>, <1200000>;
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clocks {
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compatible = "samsung,s5m8767-clk";
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#clock-cells = <1>;
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clock-output-names = "en32khz_ap",
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"en32khz_cp",
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"en32khz_bt";
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};
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regulators {
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ldo4_reg: LDO4 {
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regulator-name = "P1.0V_LDO_OUT4";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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op_mode = <0>;
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};
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ldo5_reg: LDO5 {
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regulator-name = "P1.8V_LDO_OUT5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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op_mode = <0>;
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};
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ldo6_reg: LDO6 {
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regulator-name = "vdd_mydp";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo7_reg: LDO7 {
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regulator-name = "P1.1V_LDO_OUT7";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo8_reg: LDO8 {
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regulator-name = "P1.0V_LDO_OUT8";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo10_reg: LDO10 {
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regulator-name = "P1.8V_LDO_OUT10";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo11_reg: LDO11 {
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regulator-name = "P1.8V_LDO_OUT11";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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op_mode = <0>;
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};
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ldo12_reg: LDO12 {
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regulator-name = "P3.0V_LDO_OUT12";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo13_reg: LDO13 {
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regulator-name = "P1.8V_LDO_OUT13";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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op_mode = <0>;
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};
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ldo14_reg: LDO14 {
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regulator-name = "P1.8V_LDO_OUT14";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo15_reg: LDO15 {
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regulator-name = "P1.0V_LDO_OUT15";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo16_reg: LDO16 {
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regulator-name = "P1.8V_LDO_OUT16";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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op_mode = <3>;
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};
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ldo17_reg: LDO17 {
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regulator-name = "P1.2V_LDO_OUT17";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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op_mode = <0>;
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};
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ldo25_reg: LDO25 {
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regulator-name = "vdd_bridge";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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op_mode = <1>;
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};
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buck1_reg: BUCK1 {
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regulator-name = "vdd_mif";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <1300000>;
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regulator-always-on;
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regulator-boot-on;
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op_mode = <3>;
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};
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buck2_reg: BUCK2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-boot-on;
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op_mode = <3>;
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};
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buck3_reg: BUCK3 {
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regulator-name = "vdd_int";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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regulator-boot-on;
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op_mode = <3>;
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};
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buck4_reg: BUCK4 {
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regulator-name = "vdd_g3d";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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op_mode = <3>;
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};
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buck5_reg: BUCK5 {
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regulator-name = "P1.8V_BUCK_OUT5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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op_mode = <1>;
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};
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buck6_reg: BUCK6 {
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regulator-name = "P1.2V_BUCK_OUT6";
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regulator-min-microvolt = <2050000>;
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regulator-max-microvolt = <2050000>;
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regulator-always-on;
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regulator-boot-on;
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op_mode = <0>;
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};
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buck9_reg: BUCK9 {
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regulator-name = "vdd_ummc";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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regulator-boot-on;
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op_mode = <3>;
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};
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};
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};
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};
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&i2c_1 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <378000>;
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};
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&i2c_2 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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};
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&i2c_3 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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};
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&i2c_4 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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clock-frequency = <66000>;
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cros_ec: embedded-controller {
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compatible = "google,cros-ec-i2c";
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reg = <0x1e>;
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interrupts = <6 IRQ_TYPE_NONE>;
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interrupt-parent = <&gpx1>;
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wakeup-source;
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u-boot,i2c-offset-len = <0>;
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ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
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cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
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compatible = "google,cros-ec-ldo-tunnel";
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#address-cells = <1>;
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#size-cells = <0>;
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power-regulator {
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compatible = "ti,tps65090";
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reg = <0x48>;
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regulators {
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dcdc1 {
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ti,enable-ext-control;
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};
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dcdc2 {
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ti,enable-ext-control;
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};
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dcdc3 {
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ti,enable-ext-control;
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};
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fet1: fet1 {
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regulator-name = "vcd_led";
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ti,overcurrent-wait = <3>;
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};
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tps65090_fet2: fet2 {
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regulator-name = "video_mid";
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regulator-always-on;
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ti,overcurrent-wait = <3>;
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};
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fet3 {
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regulator-name = "wwan_r";
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regulator-always-on;
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ti,overcurrent-wait = <3>;
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};
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fet4 {
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regulator-name = "sdcard";
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ti,overcurrent-wait = <3>;
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};
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fet5 {
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regulator-name = "camout";
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regulator-always-on;
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ti,overcurrent-wait = <3>;
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};
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fet6: fet6 {
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regulator-name = "lcd_vdd";
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ti,overcurrent-wait = <3>;
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};
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tps65090_fet7: fet7 {
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regulator-name = "video_mid_1a";
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regulator-always-on;
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ti,overcurrent-wait = <3>;
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};
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ldo1 {
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};
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ldo2 {
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};
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};
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};
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};
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};
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};
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&i2c_5 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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};
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&i2c_7 {
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status = "okay";
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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ps8622-bridge@8 {
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compatible = "parade,ps8622";
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reg = <0x8>;
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sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
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reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
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hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
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power-supply = <&ldo6_reg>;
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parade,regs = /bits/ 8 <
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0x02 0xa1 0x01 /* HPD low */
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/*
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* SW setting: [1:0] SW output 1.2V voltage is
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* lower to 96%
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*/
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0x04 0x14 0x01
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/* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
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0x04 0xe3 0x20
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0x04 0xe2 0x80 /* [7] RCO SS enable */
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/*
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* RPHY Setting: [3:2] CDR tune wait cycle before
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* measure for fine tune b00: 1us,
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* 01: 0.5us, 10:2us, 11:4us
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*/
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0x04 0x8a 0x0c
|
|
0x04 0x89 0x08 /* [3] RFD always on */
|
|
/*
|
|
* CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
|
|
*/
|
|
0x04 0x71 0x2d
|
|
/* 2.7G CDR settings */
|
|
0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
|
|
0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
|
|
0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
|
|
/*
|
|
* 1.62G CDR settings:
|
|
* [5:2]NOF=64LSB [1:0]DCO scale is 2/5
|
|
*/
|
|
0x04 0xc0 0x12
|
|
0x04 0xc1 0x92 /* Gitune=-37% */
|
|
0x04 0xc2 0x1c /* Fbstep=100% */
|
|
0x04 0x32 0x80 /* [7] LOS signal disable */
|
|
/* RPIO Setting */
|
|
/* [7:4] LVDS driver bias current 75% (250mV swing) */
|
|
0x04 0x00 0xb0
|
|
/* [7:6] Right-bar GPIO output strength is 8mA */
|
|
0x04 0x15 0x40
|
|
/* EQ Training State Machine Setting */
|
|
0x04 0x54 0x10 /* RCO calibration start */
|
|
/* [4:0] MAX_LANE_COUNT set to one lane */
|
|
0x01 0x02 0x81
|
|
/* [4:0] LANE_COUNT_SET set to one lane */
|
|
0x01 0x21 0x81
|
|
0x00 0x52 0x20
|
|
0x00 0xf1 0x03 /* HPD CP toggle enable */
|
|
0x00 0x62 0x41
|
|
/* Counter number add 1ms counter delay */
|
|
0x00 0xf6 0x01
|
|
/*
|
|
* [6]PWM function control by DPCD0040f[7], default
|
|
* is PWM block always works
|
|
*/
|
|
0x00 0x77 0x06
|
|
0x00 0x4c 0x04
|
|
/*
|
|
* 04h Adjust VTotal tolerance to fix the 30Hz no-
|
|
* display issue
|
|
* DPCD00400='h00 Parade OUI = 'h001cf8
|
|
*/
|
|
0x01 0xc0 0x00
|
|
0x01 0xc1 0x1c /* DPCD00401='h1c */
|
|
0x01 0xc2 0xf8 /* DPCD00402='hf8 */
|
|
/* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
|
|
0x01 0xc3 0x44
|
|
0x01 0xc4 0x32 /* DPCD404 */
|
|
0x01 0xc5 0x53 /* DPCD405 */
|
|
0x01 0xc6 0x4c /* DPCD406 */
|
|
0x01 0xc7 0x56 /* DPCD407 */
|
|
0x01 0xc8 0x35 /* DPCD408 */
|
|
/* DPCD40A Initial Code major revision '01' */
|
|
0x01 0xca 0x01
|
|
/* DPCD40B Initial Code minor revision '05' */
|
|
0x01 0xcb 0x05
|
|
0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
|
|
/*
|
|
* 0xff for 100% PWM of brightness, 0h for 0% brightness
|
|
*/
|
|
0x01 0xa7 0x00
|
|
/*
|
|
* Set LVDS output as 6bit-VESA mapping, single LVDS
|
|
* channel
|
|
*/
|
|
0x01 0xcc 0x13
|
|
0x02 0xb1 0x20 /* Enable SSC set by register */
|
|
/* Set SSC enabled and +/-1% central spreading */
|
|
0x04 0x10 0x16
|
|
0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
|
|
0x04 0x54 0x14 /* LC -> RCO */
|
|
0x02 0xa1 0x91>; /* HPD high */
|
|
};
|
|
|
|
soundcodec@20 {
|
|
reg = <0x20>;
|
|
compatible = "maxim,max98088-codec";
|
|
};
|
|
};
|
|
|
|
#include "cros-ec-keyboard.dtsi"
|