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ea436dbc40
Add a new compatible for mt8195 to add a workaround for hardware issue. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
46 lines
1.6 KiB
Text
46 lines
1.6 KiB
Text
MediaTek xHCI
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The device node for USB3 host controller on MediaTek SoCs.
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Required properties:
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- compatible : should be one of
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"mediatek,mtk-xhci"
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"mediatek,mt8195-xhci"
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- reg : specifies physical base address and size of the registers
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- reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
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- power-domains : a phandle to USB power domain node to control USB's
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MTCMOS
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- vusb33-supply : regulator of USB avdd3.3v
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- clocks : a list of phandle + clock-specifier pairs, one for each
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entry in clock-names
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- clock-names : must contain
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"sys_ck": controller clock used by normal mode,
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the following ones are optional:
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"ref_ck": reference clock used by low power mode etc,
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"mcu_ck": mcu_bus clock for register access,
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"dma_ck": dma_bus clock for data transfer by DMA,
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"xhci_ck": controller clock
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- phys : list of all the USB PHYs on this HCD
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- phy-names: name specifier for the USB PHY
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Optional properties:
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- vbus-supply : reference to the VBUS regulator;
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- mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
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bit1 for u3port1, ... etc;
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- mediatek,u2p-dis-msk : mask to disable u2ports, bit0 for u2port0,
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bit1 for u2port1, ... etc;
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Example:
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xhci: usb@1a0c0000 {
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compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci";
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reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>;
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reg-names = "mac", "ippc";
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power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;
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clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>,
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<&ssusbsys CLK_SSUSB_MCU_EN>, <&ssusbsys CLK_SSUSB_DMA_EN>;
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clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
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phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
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status = "disabled";
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};
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